From 1b54b4fad5650f2204d36974d6daaab1d01fd1c5 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 31 Jan 2024 22:07:15 -0800 Subject: [PATCH] intel/brw: Use VEC for NIR vec*() sources This writes the whole destination register in a single builder call. Eventually, VEC will write the whole destination register in one go, allowing better visibility into how it is defined. Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 6dbd59e2b17..5f689f61421 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1051,16 +1051,21 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr, nir_component_mask_t write_mask = get_nir_write_mask(instr->def); unsigned last_bit = util_last_bit(write_mask); - for (unsigned i = 0; i < last_bit; i++) { - if (!(write_mask & (1 << i))) - continue; + fs_reg comps[last_bit]; - if (instr->op == nir_op_mov) { - bld.MOV(offset(temp, bld, i), - offset(op[0], bld, instr->src[0].swizzle[i])); - } else { - bld.MOV(offset(temp, bld, i), - offset(op[i], bld, instr->src[i].swizzle[0])); + for (unsigned i = 0; i < last_bit; i++) { + if (instr->op == nir_op_mov) + comps[i] = offset(op[0], bld, instr->src[0].swizzle[i]); + else + comps[i] = offset(op[i], bld, instr->src[i].swizzle[0]); + } + + if (write_mask == (1u << last_bit) - 1) { + bld.VEC(temp, comps, last_bit); + } else { + for (unsigned i = 0; i < last_bit; i++) { + if (write_mask & (1 << i)) + bld.MOV(offset(temp, bld, i), comps[i]); } }