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all: rename gl_shader_stage to mesa_shader_stage

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It's not only for GL, change to a generic name.

Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
This commit is contained in:
Qiang Yu
2025-08-05 15:54:29 +08:00
parent 4c7244fac5
commit 196569b1a4
292 changed files with 933 additions and 933 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/microsoft/compiler/dxil_signature.c
+4 -4
View File
@@ -181,10 +181,10 @@ get_additional_semantic_info(nir_shader *s, nir_variable *var, struct semantic_i
return next_row;
}
typedef void (*semantic_info_proc)(nir_variable *var, struct semantic_info *info, gl_shader_stage stage);
typedef void (*semantic_info_proc)(nir_variable *var, struct semantic_info *info, mesa_shader_stage stage);
static void
get_semantic_vs_in_name(nir_variable *var, struct semantic_info *info, gl_shader_stage stage)
get_semantic_vs_in_name(nir_variable *var, struct semantic_info *info, mesa_shader_stage stage)
{
strcpy(info->name, "TEXCOORD");
info->index = var->data.driver_location;
@@ -192,7 +192,7 @@ get_semantic_vs_in_name(nir_variable *var, struct semantic_info *info, gl_shader
}
static void
get_semantic_sv_name(nir_variable *var, struct semantic_info *info, gl_shader_stage stage)
get_semantic_sv_name(nir_variable *var, struct semantic_info *info, mesa_shader_stage stage)
{
if (stage != MESA_SHADER_VERTEX)
info->interpolation = get_interpolation(var);
@@ -327,7 +327,7 @@ get_semantic_name(nir_variable *var, struct semantic_info *info,
}
static void
get_semantic_in_name(nir_variable *var, struct semantic_info *info, gl_shader_stage stage)
get_semantic_in_name(nir_variable *var, struct semantic_info *info, mesa_shader_stage stage)
{
const struct glsl_type *type = var->type;
if (nir_is_arrayed_io(var, stage) &&
src/microsoft/compiler/nir_to_dxil.c
+1 -1
View File
@@ -6477,7 +6477,7 @@ struct sysvalue_name {
gl_system_value value;
int slot;
char *name;
gl_shader_stage only_in_shader;
mesa_shader_stage only_in_shader;
} possible_sysvalues[] = {
{SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, -1, "SV_VertexID", MESA_SHADER_NONE},
{SYSTEM_VALUE_INSTANCE_ID, -1, "SV_InstanceID", MESA_SHADER_NONE},
src/microsoft/spirv_to_dxil/spirv2dxil.c
+4 -4
View File
@@ -42,7 +42,7 @@
#define WORD_SIZE 4
static gl_shader_stage
static mesa_shader_stage
stage_to_enum(char *stage)
{
if (!strcmp(stage, "vertex"))
@@ -79,7 +79,7 @@ enum dxil_validator_version val_ver = DXIL_VALIDATOR_1_4;
struct nir_shader_compiler_options nir_options;
static bool
compile_shader(const char *filename, gl_shader_stage shader_stage, struct shader *shader,
compile_shader(const char *filename, mesa_shader_stage shader_stage, struct shader *shader,
struct dxil_spirv_runtime_conf *conf)
{
size_t file_size;
@@ -102,7 +102,7 @@ compile_shader(const char *filename, gl_shader_stage shader_stage, struct shader
shader->nir = spirv_to_nir(
(const uint32_t *)file_contents, word_count, NULL,
0, (gl_shader_stage)shader_stage, shader->entry_point,
0, (mesa_shader_stage)shader_stage, shader->entry_point,
spirv_opts, &nir_options);
free(file_contents);
if (!shader->nir) {
@@ -174,7 +174,7 @@ main(int argc, char **argv)
.entry_point = "main",
.output_file = NULL,
};
gl_shader_stage shader_stage = MESA_SHADER_FRAGMENT;
mesa_shader_stage shader_stage = MESA_SHADER_FRAGMENT;
struct dxil_spirv_runtime_conf conf;
memset(&conf, 0, sizeof(conf));
src/microsoft/spirv_to_dxil/spirv_to_dxil.c
+9 -9
View File
@@ -32,14 +32,14 @@
#include "git_sha1.h"
#include "vulkan/vulkan.h"
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_NONE == MESA_SHADER_NONE, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_VERTEX == MESA_SHADER_VERTEX, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_TESS_CTRL == MESA_SHADER_TESS_CTRL, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_TESS_EVAL == MESA_SHADER_TESS_EVAL, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_GEOMETRY == MESA_SHADER_GEOMETRY, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_FRAGMENT == MESA_SHADER_FRAGMENT, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_COMPUTE == MESA_SHADER_COMPUTE, "must match");
static_assert((gl_shader_stage)DXIL_SPIRV_SHADER_KERNEL == MESA_SHADER_KERNEL, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_NONE == MESA_SHADER_NONE, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_VERTEX == MESA_SHADER_VERTEX, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_TESS_CTRL == MESA_SHADER_TESS_CTRL, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_TESS_EVAL == MESA_SHADER_TESS_EVAL, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_GEOMETRY == MESA_SHADER_GEOMETRY, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_FRAGMENT == MESA_SHADER_FRAGMENT, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_COMPUTE == MESA_SHADER_COMPUTE, "must match");
static_assert((mesa_shader_stage)DXIL_SPIRV_SHADER_KERNEL == MESA_SHADER_KERNEL, "must match");
bool
spirv_to_dxil(const uint32_t *words, size_t word_count,
@@ -73,7 +73,7 @@ spirv_to_dxil(const uint32_t *words, size_t word_count,
nir_shader *nir = spirv_to_nir(
words, word_count, (struct nir_spirv_specialization *)specializations,
num_specializations, (gl_shader_stage)stage, entry_point_name,
num_specializations, (mesa_shader_stage)stage, entry_point_name,
spirv_opts, &nir_options);
if (!nir) {
glsl_type_singleton_decref();
src/microsoft/spirv_to_dxil/spirv_to_dxil.h
+1 -1
View File
@@ -37,7 +37,7 @@ extern "C" {
// NB: I've copy and pasted some types into this header so we don't have to
// include other headers. This will surely break if any of these types change.
// Copy of gl_shader_stage
// Copy of mesa_shader_stage
typedef enum {
DXIL_SPIRV_SHADER_NONE = -1,
DXIL_SPIRV_SHADER_VERTEX = 0,
src/microsoft/vulkan/dzn_pipeline.c
+15 -15
View File
@@ -218,7 +218,7 @@ dzn_pipeline_get_nir_shader(struct dzn_device *device,
const uint8_t *hash,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage_info,
gl_shader_stage stage,
mesa_shader_stage stage,
const struct dzn_nir_options *options,
struct dxil_spirv_metadata *metadata,
nir_shader **nir)
@@ -490,7 +490,7 @@ dzn_pipeline_compile_shader(struct dzn_device *device,
static D3D12_SHADER_BYTECODE *
dzn_pipeline_get_gfx_shader_slot(D3D12_PIPELINE_STATE_STREAM_DESC *stream,
gl_shader_stage in)
mesa_shader_stage in)
{
switch (in) {
case MESA_SHADER_VERTEX: {
@@ -518,7 +518,7 @@ dzn_pipeline_get_gfx_shader_slot(D3D12_PIPELINE_STATE_STREAM_DESC *stream,
}
struct dzn_cached_dxil_shader_header {
gl_shader_stage stage;
mesa_shader_stage stage;
size_t size;
uint8_t data[0];
};
@@ -526,7 +526,7 @@ struct dzn_cached_dxil_shader_header {
static VkResult
dzn_pipeline_cache_lookup_dxil_shader(struct vk_pipeline_cache *cache,
const uint8_t *dxil_hash,
gl_shader_stage *stage,
mesa_shader_stage *stage,
D3D12_SHADER_BYTECODE *bc)
{
*stage = MESA_SHADER_NONE;
@@ -576,7 +576,7 @@ out:
static void
dzn_pipeline_cache_add_dxil_shader(struct vk_pipeline_cache *cache,
const uint8_t *dxil_hash,
gl_shader_stage stage,
mesa_shader_stage stage,
const D3D12_SHADER_BYTECODE *bc)
{
size_t size = sizeof(struct dzn_cached_dxil_shader_header) +
@@ -655,7 +655,7 @@ dzn_pipeline_cache_lookup_gfx_pipeline(struct dzn_graphics_pipeline *pipeline,
u_foreach_bit(s, info->stages) {
uint8_t *dxil_hash = (uint8_t *)cached_blob->data + offset;
gl_shader_stage stage;
mesa_shader_stage stage;
D3D12_SHADER_BYTECODE *slot =
dzn_pipeline_get_gfx_shader_slot(stream_desc, s);
@@ -771,16 +771,16 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
const uint8_t *dxil_hashes[MESA_VULKAN_SHADER_STAGES] = { 0 };
uint8_t attribs_hash[SHA1_DIGEST_LENGTH];
uint8_t pipeline_hash[SHA1_DIGEST_LENGTH];
gl_shader_stage last_raster_stage = MESA_SHADER_NONE;
mesa_shader_stage last_raster_stage = MESA_SHADER_NONE;
uint32_t active_stage_mask = 0;
VkResult ret;
/* First step: collect stage info in a table indexed by gl_shader_stage
/* First step: collect stage info in a table indexed by mesa_shader_stage
* so we can iterate over stages in pipeline order or reverse pipeline
* order.
*/
for (uint32_t i = 0; i < info->stageCount; i++) {
gl_shader_stage stage =
mesa_shader_stage stage =
vk_to_mesa_shader_stage(info->pStages[i].stage);
assert(stage <= MESA_SHADER_FRAGMENT);
@@ -982,9 +982,9 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
*/
uint32_t link_mask = active_stage_mask;
while (link_mask != 0) {
gl_shader_stage stage = util_last_bit(link_mask) - 1;
mesa_shader_stage stage = util_last_bit(link_mask) - 1;
link_mask &= ~BITFIELD_BIT(stage);
gl_shader_stage prev_stage = util_last_bit(link_mask) - 1;
mesa_shader_stage prev_stage = util_last_bit(link_mask) - 1;
struct dxil_spirv_runtime_conf conf = {
.runtime_data_cbv = {
@@ -1023,7 +1023,7 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
_mesa_sha1_final(&dxil_hash_ctx, stages[stage].dxil_hash);
dxil_hashes[stage] = stages[stage].dxil_hash;
gl_shader_stage cached_stage;
mesa_shader_stage cached_stage;
D3D12_SHADER_BYTECODE bc;
ret = dzn_pipeline_cache_lookup_dxil_shader(cache, stages[stage].dxil_hash, &cached_stage, &bc);
if (ret != VK_SUCCESS)
@@ -1064,7 +1064,7 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
/* Last step: translate NIR shaders into DXIL modules */
u_foreach_bit(stage, active_stage_mask) {
gl_shader_stage prev_stage =
mesa_shader_stage prev_stage =
util_last_bit(active_stage_mask & BITFIELD_MASK(stage)) - 1;
uint32_t prev_stage_output_clip_size = 0;
if (stage == MESA_SHADER_FRAGMENT) {
@@ -2443,7 +2443,7 @@ dzn_pipeline_cache_lookup_compute_pipeline(struct vk_pipeline_cache *cache,
assert(cached_blob->size == SHA1_DIGEST_LENGTH);
const uint8_t *dxil_hash = cached_blob->data;
gl_shader_stage stage;
mesa_shader_stage stage;
VkResult ret =
dzn_pipeline_cache_lookup_dxil_shader(cache, dxil_hash, &stage, dxil);
@@ -2549,7 +2549,7 @@ dzn_compute_pipeline_compile_shader(struct dzn_device *device,
_mesa_sha1_update(&dxil_hash_ctx, bindings_hash, sizeof(bindings_hash));
_mesa_sha1_final(&dxil_hash_ctx, dxil_hash);
gl_shader_stage stage;
mesa_shader_stage stage;
ret = dzn_pipeline_cache_lookup_dxil_shader(cache, dxil_hash, &stage, shader);
if (ret != VK_SUCCESS)