radv,aco: implement nir_op_ffma
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9805>
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@@ -2092,6 +2092,35 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
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}
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break;
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}
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case nir_op_ffma: {
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if (dst.regClass() == v2b) {
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emit_vop3a_instruction(ctx, instr, aco_opcode::v_fma_f16, dst, false, 3);
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} else if (dst.regClass() == v1 && instr->dest.dest.ssa.bit_size == 16) {
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assert(instr->dest.dest.ssa.num_components == 2);
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Temp src0 = as_vgpr(ctx, get_alu_src_vop3p(ctx, instr->src[0]));
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Temp src1 = as_vgpr(ctx, get_alu_src_vop3p(ctx, instr->src[1]));
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Temp src2 = as_vgpr(ctx, get_alu_src_vop3p(ctx, instr->src[2]));
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/* swizzle to opsel: all swizzles are either 0 (x) or 1 (y) */
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unsigned opsel_lo = 0, opsel_hi = 0;
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for (unsigned i = 0; i < 3; i++) {
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opsel_lo |= (instr->src[i].swizzle[0] & 1) << i;
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opsel_hi |= (instr->src[i].swizzle[1] & 1) << i;
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}
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bld.vop3p(aco_opcode::v_pk_fma_f16, Definition(dst), src0, src1, src2, opsel_lo, opsel_hi);
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emit_split_vector(ctx, dst, 2);
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} else if (dst.regClass() == v1) {
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emit_vop3a_instruction(ctx, instr, aco_opcode::v_fma_f32, dst,
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ctx->block->fp_mode.must_flush_denorms32, 3);
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} else if (dst.regClass() == v2) {
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emit_vop3a_instruction(ctx, instr, aco_opcode::v_fma_f64, dst, false, 3);
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} else {
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isel_err(&instr->instr, "Unimplemented NIR instr bit size");
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}
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break;
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}
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case nir_op_fmax: {
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if (dst.regClass() == v2b) {
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// TODO: check fp_mode.must_flush_denorms16_64
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