From 1574a714387d0b529f06cf962a07716aaf238a5a Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 19 Nov 2025 10:41:58 -0500 Subject: [PATCH] nir/lower_wrmasks: clean up & deprecate pass MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The usual pass modernization with the twist that I don't want new drivers actually using it (-: Signed-off-by: Alyssa Rosenzweig Reviewed-by: Kenneth Graunke Reviewed-by: Marek Olšák Part-of: --- src/compiler/nir/nir_lower_wrmasks.c | 120 ++++----------------------- 1 file changed, 18 insertions(+), 102 deletions(-) diff --git a/src/compiler/nir/nir_lower_wrmasks.c b/src/compiler/nir/nir_lower_wrmasks.c index 9ac063fec4a..f5f2dad5332 100644 --- a/src/compiler/nir/nir_lower_wrmasks.c +++ b/src/compiler/nir/nir_lower_wrmasks.c @@ -1,110 +1,47 @@ /* - * Copyright © 2020 Google, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. + * Copyright 2020 Google, Inc. + * SPDX-License-Identifier: MIT */ #include "nir.h" #include "nir_builder.h" -/* A pass to split intrinsics with discontinuous writemasks into ones - * with contiguous writemasks starting with .x, ie: +/* + * A pass to split memory stores with discontinuous writemasks into multiple + * stores with contiguous writemasks starting with .x plus address arithmetic. * - * vec4 32 ssa_76 = vec4 ssa_35, ssa_35, ssa_35, ssa_35 - * intrinsic store_ssbo (ssa_76, ssa_105, ssa_106) (2, 0, 4, 0) // wrmask=y - * - * is turned into: - * - * vec4 32 ssa_76 = vec4 ssa_35, ssa_35, ssa_35, ssa_35 - * vec1 32 ssa_107 = load_const (0x00000001) - * vec1 32 ssa_108 = iadd ssa_106, ssa_107 - * vec1 32 ssa_109 = mov ssa_76.y - * intrinsic store_ssbo (ssa_109, ssa_105, ssa_108) (1, 0, 4, 0) // wrmask=x - * - * and likewise: - * - * vec4 32 ssa_76 = vec4 ssa_35, ssa_35, ssa_35, ssa_35 - * intrinsic store_ssbo (ssa_76, ssa_105, ssa_106) (15, 0, 4, 0) // wrmask=xzw - * - * is split into: - * - * // .x component: - * vec4 32 ssa_76 = vec4 ssa_35, ssa_35, ssa_35, ssa_35 - * vec1 32 ssa_107 = load_const (0x00000000) - * vec1 32 ssa_108 = iadd ssa_106, ssa_107 - * vec1 32 ssa_109 = mov ssa_76.x - * intrinsic store_ssbo (ssa_109, ssa_105, ssa_108) (1, 0, 4, 0) // wrmask=x - * // .zw components: - * vec1 32 ssa_110 = load_const (0x00000002) - * vec1 32 ssa_111 = iadd ssa_106, ssa_110 - * vec2 32 ssa_112 = mov ssa_76.zw - * intrinsic store_ssbo (ssa_112, ssa_105, ssa_111) (3, 0, 4, 0) // wrmask=xy + * nir_lower_mem_access_bit_sizes does this (and more). Drivers that use that + * pass should not need this one. Drivers supporting OpenCL require that pass, + * so this one is considered deprecated and should not be used by new drivers. */ - -static int -value_src(nir_intrinsic_op intrinsic) +static bool +lower(nir_builder *b, nir_intrinsic_instr *intr, void *data) { - switch (intrinsic) { + switch (intr->intrinsic) { case nir_intrinsic_store_ssbo: case nir_intrinsic_store_shared: case nir_intrinsic_store_global: case nir_intrinsic_store_scratch: - return 0; + break; default: - return -1; + return false; } -} -static int -offset_src(nir_intrinsic_op intrinsic) -{ - switch (intrinsic) { - case nir_intrinsic_store_shared: - case nir_intrinsic_store_global: - case nir_intrinsic_store_scratch: - return 1; - case nir_intrinsic_store_ssbo: - return 2; - default: - return -1; - } -} + /* if wrmask is already contiguous, then nothing to do: */ + if (nir_intrinsic_write_mask(intr) == BITFIELD_MASK(intr->num_components)) + return false; -static void -split_wrmask(nir_builder *b, nir_intrinsic_instr *intr) -{ const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic]; - b->cursor = nir_before_instr(&intr->instr); - assert(!info->has_dest); /* expecting only store intrinsics */ - unsigned num_srcs = info->num_srcs; - unsigned value_idx = value_src(intr->intrinsic); unsigned wrmask = nir_intrinsic_write_mask(intr); while (wrmask) { unsigned first_component = ffs(wrmask) - 1; unsigned length = ffs(~(wrmask >> first_component)) - 1; - nir_def *value = intr->src[value_idx].ssa; + nir_def *value = intr->src[0].ssa; /* swizzle out the consecutive components that we'll store * in this iteration: @@ -138,7 +75,7 @@ split_wrmask(nir_builder *b, nir_intrinsic_instr *intr) * else through to the new instrution: */ for (unsigned i = 0; i < num_srcs; i++) { - if (i == value_idx) { + if (i == 0) { new_intr->src[i] = nir_src_for_ssa(value); } else { new_intr->src[i] = intr->src[i]; @@ -163,27 +100,6 @@ split_wrmask(nir_builder *b, nir_intrinsic_instr *intr) /* Finally remove the original intrinsic. */ nir_instr_remove(&intr->instr); -} - -static bool -lower(nir_builder *b, nir_intrinsic_instr *intr, void *data) -{ - /* if no wrmask, then skip it: */ - if (!nir_intrinsic_has_write_mask(intr)) - return false; - - /* if wrmask is already contiguous, then nothing to do: */ - if (nir_intrinsic_write_mask(intr) == BITFIELD_MASK(intr->num_components)) - return false; - - /* do we know how to lower this instruction? */ - if (value_src(intr->intrinsic) < 0) - return false; - - assert(offset_src(intr->intrinsic) >= 0); - - split_wrmask(b, intr); - return true; }