diff --git a/src/amd/vulkan/nir/radv_nir_lower_io.c b/src/amd/vulkan/nir/radv_nir_lower_io.c index a4b03a87414..2f727fc2828 100644 --- a/src/amd/vulkan/nir/radv_nir_lower_io.c +++ b/src/amd/vulkan/nir/radv_nir_lower_io.c @@ -146,7 +146,7 @@ radv_nir_lower_io(struct radv_device *device, nir_shader *nir) nir_lower_direct_array_deref_of_vec_store | nir_lower_indirect_array_deref_of_vec_store); if (nir->info.stage == MESA_SHADER_TESS_CTRL) { - NIR_PASS(_, nir, nir_vectorize_tess_levels); + NIR_PASS(_, nir, nir_lower_tess_level_array_vars_to_vec); } if (nir->info.stage == MESA_SHADER_VERTEX) { diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index b2b5f85bddb..4b8a7cd41ad 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1239,7 +1239,7 @@ radv_link_shaders(const struct radv_device *device, struct radv_shader_stage *pr NIR_PASS(_, producer, nir_opt_vectorize_io_vars, nir_var_shader_out); if (producer->info.stage == MESA_SHADER_TESS_CTRL) - NIR_PASS(_, producer, nir_vectorize_tess_levels); + NIR_PASS(_, producer, nir_lower_tess_level_array_vars_to_vec); NIR_PASS(_, producer, nir_opt_combine_stores, nir_var_shader_out); } diff --git a/src/compiler/glsl/gl_nir_linker.c b/src/compiler/glsl/gl_nir_linker.c index 35c32db1853..4f9f3a7822d 100644 --- a/src/compiler/glsl/gl_nir_linker.c +++ b/src/compiler/glsl/gl_nir_linker.c @@ -1427,7 +1427,7 @@ prelink_lowering(const struct gl_constants *consts, if (!nir->options->compact_arrays) { NIR_PASS(_, nir, nir_lower_clip_cull_distance_to_vec4s); - NIR_PASS(_, nir, nir_vectorize_tess_levels); + NIR_PASS(_, nir, nir_lower_tess_level_array_vars_to_vec); } /* Combine clip and cull outputs into one array and set: diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 562af767b1d..b5207f4f3bb 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -5314,7 +5314,7 @@ bool nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader, bool nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask, nir_instr_filter_cb filter, void *filter_data); bool nir_lower_io_vars_to_scalar(nir_shader *shader, nir_variable_mode mask); bool nir_opt_vectorize_io_vars(nir_shader *shader, nir_variable_mode mask); -bool nir_vectorize_tess_levels(nir_shader *shader); +bool nir_lower_tess_level_array_vars_to_vec(nir_shader *shader); nir_shader *nir_create_passthrough_tcs_impl(const nir_shader_compiler_options *options, unsigned *locations, unsigned num_locations, uint8_t patch_vertices); diff --git a/src/compiler/nir/nir_opt_vectorize_io_vars.c b/src/compiler/nir/nir_opt_vectorize_io_vars.c index 62356c49156..7750be11dc9 100644 --- a/src/compiler/nir/nir_opt_vectorize_io_vars.c +++ b/src/compiler/nir/nir_opt_vectorize_io_vars.c @@ -601,7 +601,7 @@ is_tess_level_variable(nir_variable *var) * can be combined by nir_opt_cse()/nir_opt_combine_stores(). */ bool -nir_vectorize_tess_levels(nir_shader *shader) +nir_lower_tess_level_array_vars_to_vec(nir_shader *shader) { nir_variable_mode mode; if (shader->info.stage == MESA_SHADER_TESS_CTRL) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index b01843a60dc..ce02dd40183 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1526,7 +1526,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler, if (producer->info.stage == MESA_SHADER_TESS_CTRL && producer->options->vectorize_tess_levels) - NIR_PASS_V(producer, nir_vectorize_tess_levels); + NIR_PASS_V(producer, nir_lower_tess_level_array_vars_to_vec); NIR_PASS(_, producer, nir_opt_combine_stores, nir_var_shader_out); NIR_PASS(_, consumer, nir_opt_vectorize_io_vars, nir_var_shader_in); diff --git a/src/intel/compiler/elk/elk_nir.c b/src/intel/compiler/elk/elk_nir.c index 7a203b20c0a..a168372c21e 100644 --- a/src/intel/compiler/elk/elk_nir.c +++ b/src/intel/compiler/elk/elk_nir.c @@ -1196,7 +1196,7 @@ elk_nir_link_shaders(const struct elk_compiler *compiler, if (producer->info.stage == MESA_SHADER_TESS_CTRL && producer->options->vectorize_tess_levels) - NIR_PASS_V(producer, nir_vectorize_tess_levels); + NIR_PASS_V(producer, nir_lower_tess_level_array_vars_to_vec); NIR_PASS(_, producer, nir_opt_combine_stores, nir_var_shader_out); NIR_PASS(_, consumer, nir_opt_vectorize_io_vars, nir_var_shader_in); diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c index d51ad08cd4f..a84b691bc44 100644 --- a/src/mesa/state_tracker/st_program.c +++ b/src/mesa/state_tracker/st_program.c @@ -841,7 +841,7 @@ st_create_common_variant(struct st_context *st, if (state.ir.nir->info.stage == MESA_SHADER_TESS_CTRL && state.ir.nir->options->compact_arrays && state.ir.nir->options->vectorize_tess_levels) - NIR_PASS(_, state.ir.nir, nir_vectorize_tess_levels); + NIR_PASS(_, state.ir.nir, nir_lower_tess_level_array_vars_to_vec); gl_nir_opts(state.ir.nir); finalize = true;