diff --git a/src/amd/common/ac_shader_util.c b/src/amd/common/ac_shader_util.c
index 52c87e56c67..0660914f37d 100644
--- a/src/amd/common/ac_shader_util.c
+++ b/src/amd/common/ac_shader_util.c
@@ -270,11 +270,13 @@ enum ac_image_dim ac_get_image_dim(enum chip_class chip_class, enum glsl_sampler
 
 unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
                                   signed char *face_vgpr_index_ptr,
-                                  signed char *ancillary_vgpr_index_ptr)
+                                  signed char *ancillary_vgpr_index_ptr,
+                                  signed char *sample_coverage_vgpr_index_ptr)
 {
    unsigned num_input_vgprs = 0;
    signed char face_vgpr_index = -1;
    signed char ancillary_vgpr_index = -1;
+   signed char sample_coverage_vgpr_index = -1;
 
    if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr))
       num_input_vgprs += 2;
@@ -308,8 +310,10 @@ unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
       ancillary_vgpr_index = num_input_vgprs;
       num_input_vgprs += 1;
    }
-   if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr))
+   if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr)) {
+      sample_coverage_vgpr_index = num_input_vgprs;
       num_input_vgprs += 1;
+   }
    if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr))
       num_input_vgprs += 1;
 
@@ -317,6 +321,8 @@ unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
       *face_vgpr_index_ptr = face_vgpr_index;
    if (ancillary_vgpr_index_ptr)
       *ancillary_vgpr_index_ptr = ancillary_vgpr_index;
+   if (sample_coverage_vgpr_index_ptr)
+      *sample_coverage_vgpr_index_ptr = sample_coverage_vgpr_index;
 
    return num_input_vgprs;
 }
diff --git a/src/amd/common/ac_shader_util.h b/src/amd/common/ac_shader_util.h
index b86e81ca039..49f414d57d6 100644
--- a/src/amd/common/ac_shader_util.h
+++ b/src/amd/common/ac_shader_util.h
@@ -96,7 +96,8 @@ enum ac_image_dim ac_get_image_dim(enum chip_class chip_class, enum glsl_sampler
                                    bool is_array);
 
 unsigned ac_get_fs_input_vgpr_cnt(const struct ac_shader_config *config,
-                                  signed char *face_vgpr_index, signed char *ancillary_vgpr_index);
+                                  signed char *face_vgpr_index, signed char *ancillary_vgpr_index,
+                                  signed char *sample_coverage_vgpr_index_ptr);
 
 void ac_choose_spi_color_formats(unsigned format, unsigned swap, unsigned ntype,
                                  bool is_depth, bool use_rbplus,
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 10d09d8edae..79b31e231bb 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -1372,7 +1372,7 @@ radv_postprocess_config(const struct radv_device *device, const struct ac_shader
    unsigned num_input_vgprs = args->ac.num_vgprs_used;
 
    if (stage == MESA_SHADER_FRAGMENT) {
-      num_input_vgprs = ac_get_fs_input_vgpr_cnt(config_in, NULL, NULL);
+      num_input_vgprs = ac_get_fs_input_vgpr_cnt(config_in, NULL, NULL, NULL);
    }
 
    unsigned num_vgprs = MAX2(config_in->num_vgprs, num_input_vgprs);
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 9cdf8e9da29..c019f719f10 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -679,6 +679,7 @@ void si_init_shader_args(struct si_shader_context *ctx, bool ngg_cull_shader)
       shader->info.ancillary_vgpr_index = ctx->args.num_vgprs_used;
       si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.ancillary,
                          SI_PARAM_ANCILLARY);
+      shader->info.sample_coverage_vgpr_index = ctx->args.num_vgprs_used;
       si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &ctx->args.sample_coverage,
                          SI_PARAM_SAMPLE_COVERAGE);
       si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->pos_fixed_pt,
@@ -1558,7 +1559,8 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi
    /* Calculate the number of fragment input VGPRs. */
    if (sel->info.stage == MESA_SHADER_FRAGMENT) {
       shader->info.num_input_vgprs = ac_get_fs_input_vgpr_cnt(
-         &shader->config, &shader->info.face_vgpr_index, &shader->info.ancillary_vgpr_index);
+         &shader->config, &shader->info.face_vgpr_index, &shader->info.ancillary_vgpr_index,
+         &shader->info.sample_coverage_vgpr_index);
    }
 
    si_calculate_max_simd_waves(shader);
@@ -1767,6 +1769,7 @@ void si_get_ps_prolog_key(struct si_shader *shader, union si_shader_part_key *ke
        key->ps_prolog.states.force_linear_center_interp ||
        key->ps_prolog.states.bc_optimize_for_persp || key->ps_prolog.states.bc_optimize_for_linear);
    key->ps_prolog.ancillary_vgpr_index = shader->info.ancillary_vgpr_index;
+   key->ps_prolog.sample_coverage_vgpr_index = shader->info.sample_coverage_vgpr_index;
 
    if (info->colors_read) {
       ubyte *color = shader->selector->color_attr_index;
@@ -2067,6 +2070,7 @@ bool si_create_shader_variant(struct si_screen *sscreen, struct ac_llvm_compiler
       shader->info.num_input_vgprs = mainp->info.num_input_vgprs;
       shader->info.face_vgpr_index = mainp->info.face_vgpr_index;
       shader->info.ancillary_vgpr_index = mainp->info.ancillary_vgpr_index;
+      shader->info.sample_coverage_vgpr_index = mainp->info.sample_coverage_vgpr_index;
       memcpy(shader->info.vs_output_ps_input_cntl, mainp->info.vs_output_ps_input_cntl,
              sizeof(mainp->info.vs_output_ps_input_cntl));
       shader->info.uses_instanceid = mainp->info.uses_instanceid;
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index f967ccea7af..984a53db8a1 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -611,6 +611,7 @@ union si_shader_part_key {
       unsigned num_interp_inputs : 5; /* BCOLOR is at this location */
       unsigned face_vgpr_index : 5;
       unsigned ancillary_vgpr_index : 5;
+      unsigned sample_coverage_vgpr_index : 5;
       unsigned wqm : 1;
       char color_attr_index[2];
       signed char color_interp_vgpr_index[2]; /* -1 == constant */
@@ -747,6 +748,7 @@ struct si_shader_binary_info {
    ubyte num_input_vgprs;
    signed char face_vgpr_index;
    signed char ancillary_vgpr_index;
+   signed char sample_coverage_vgpr_index;
    bool uses_instanceid;
    ubyte nr_pos_exports;
    ubyte nr_param_exports;
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c b/src/gallium/drivers/radeonsi/si_shader_llvm.c
index 8ece050561b..69c43f013a4 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c
@@ -215,7 +215,8 @@ void si_llvm_create_main_func(struct si_shader_context *ctx, bool ngg_cull_shade
          S_0286D0_PERSP_SAMPLE_ENA(1) | S_0286D0_PERSP_CENTER_ENA(1) |
             S_0286D0_PERSP_CENTROID_ENA(1) | S_0286D0_LINEAR_SAMPLE_ENA(1) |
             S_0286D0_LINEAR_CENTER_ENA(1) | S_0286D0_LINEAR_CENTROID_ENA(1) |
-            S_0286D0_FRONT_FACE_ENA(1) | S_0286D0_ANCILLARY_ENA(1) | S_0286D0_POS_FIXED_PT_ENA(1));
+            S_0286D0_FRONT_FACE_ENA(1) | S_0286D0_ANCILLARY_ENA(1) |
+            S_0286D0_SAMPLE_COVERAGE_ENA(1) | S_0286D0_POS_FIXED_PT_ENA(1));
    }
 
 
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c b/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c
index f46faa365c8..8a14ab97b81 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c
@@ -611,7 +611,7 @@ void si_llvm_build_ps_prolog(struct si_shader_context *ctx, union si_shader_part
       struct ac_arg *arg = NULL;
       if (i == key->ps_prolog.ancillary_vgpr_index) {
          arg = &ancillary;
-      } else if (i == key->ps_prolog.ancillary_vgpr_index + 1) {
+      } else if (i == key->ps_prolog.sample_coverage_vgpr_index) {
          arg = &param_sample_mask;
       } else if (i == key->ps_prolog.num_input_vgprs - 1) {
          /* POS_FIXED_PT is always last. */