From 12b0e03bd244eed12912f0e102c907fc8a63df89 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 11 Apr 2024 00:42:28 -0700 Subject: [PATCH] intel/brw: Use SHADER_OPCODE_SEND for coherent framebuffer reads We already have a logical opcode and lower to what is basically a send instruction. We just weren't using SHADER_OPCODE_SEND, instead having extra redundant infrastructure for no real gain. Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_eu.h | 15 ---------- src/intel/compiler/brw_eu_defines.h | 1 - src/intel/compiler/brw_eu_emit.c | 30 ------------------- src/intel/compiler/brw_fs.cpp | 6 ---- src/intel/compiler/brw_fs.h | 2 -- src/intel/compiler/brw_fs_generator.cpp | 19 ------------ src/intel/compiler/brw_ir_performance.cpp | 4 --- .../compiler/brw_lower_logical_sends.cpp | 21 +++++++++---- 8 files changed, 16 insertions(+), 82 deletions(-) diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index e014c8a948a..8ee3f4a690c 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -1467,21 +1467,6 @@ brw_send_indirect_split_message(struct brw_codegen *p, bool ex_bso, bool eot); -void brw_svb_write(struct brw_codegen *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned binding_table_index, - bool send_commit_msg); - -brw_inst *gfx9_fb_READ(struct brw_codegen *p, - struct brw_reg dst, - struct brw_reg payload, - unsigned binding_table_index, - unsigned msg_length, - unsigned response_length, - bool per_sample); - void gfx6_math(struct brw_codegen *p, struct brw_reg dest, unsigned function, diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 49c8d09bfe5..28ea2f1a0a5 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -247,7 +247,6 @@ enum opcode { */ FS_OPCODE_FB_WRITE_LOGICAL = NUM_BRW_OPCODES, - FS_OPCODE_FB_READ, FS_OPCODE_FB_READ_LOGICAL, SHADER_OPCODE_RCP, diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index e102ab6fdd9..64834362a88 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -1416,36 +1416,6 @@ void gfx6_math(struct brw_codegen *p, brw_set_src1(p, insn, src1); } -/** - * Return the right surface index to access the thread scratch space using - * stateless dataport messages. - */ -brw_inst * -gfx9_fb_READ(struct brw_codegen *p, - struct brw_reg dst, - struct brw_reg payload, - unsigned binding_table_index, - unsigned msg_length, - unsigned response_length, - bool per_sample) -{ - const struct intel_device_info *devinfo = p->devinfo; - assert(devinfo->ver >= 9); - brw_inst *insn = next_insn(p, BRW_OPCODE_SENDC); - - brw_inst_set_sfid(devinfo, insn, GFX6_SFID_DATAPORT_RENDER_CACHE); - brw_set_dest(p, insn, dst); - brw_set_src0(p, insn, payload); - brw_set_desc( - p, insn, - brw_message_desc(devinfo, msg_length, response_length, true) | - brw_fb_read_desc(devinfo, binding_table_index, 0 /* msg_control */, - 1 << brw_get_default_exec_size(p), per_sample)); - brw_inst_set_rt_slot_group(devinfo, insn, brw_get_default_group(p) / 16); - - return insn; -} - void brw_send_indirect_message(struct brw_codegen *p, unsigned sfid, diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 1f3bc43b4a5..9a2126977a1 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -256,8 +256,6 @@ fs_inst::is_send_from_grf() const return true; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: return src[1].file == VGRF; - case FS_OPCODE_FB_READ: - return src[0].file == VGRF; default: return false; } @@ -294,7 +292,6 @@ bool fs_inst::is_payload(unsigned arg) const { switch (opcode) { - case FS_OPCODE_FB_READ: case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: @@ -917,7 +914,6 @@ fs_inst::size_read(int arg) const } break; - case FS_OPCODE_FB_READ: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: if (arg == 0) @@ -2262,8 +2258,6 @@ brw_instruction_name(const struct brw_isa_info *isa, enum opcode op) return brw_opcode_desc(isa, op)->name; case FS_OPCODE_FB_WRITE_LOGICAL: return "fb_write_logical"; - case FS_OPCODE_FB_READ: - return "fb_read"; case FS_OPCODE_FB_READ_LOGICAL: return "fb_read_logical"; diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 44f12053d0a..ad1a76df7ed 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -499,8 +499,6 @@ private: struct brw_reg ex_desc, struct brw_reg payload, struct brw_reg payload2); - void generate_fb_read(fs_inst *inst, struct brw_reg dst, - struct brw_reg payload); void generate_barrier(fs_inst *inst, struct brw_reg src); bool generate_linterp(fs_inst *inst, struct brw_reg dst, struct brw_reg *src); diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 1c41e8cc505..b5e5c7d4af2 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -261,20 +261,6 @@ fs_generator::generate_send(fs_inst *inst, } } -void -fs_generator::generate_fb_read(fs_inst *inst, struct brw_reg dst, - struct brw_reg payload) -{ - assert(inst->size_written % REG_SIZE == 0); - struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); - /* We assume that render targets start at binding table index 0. */ - const unsigned surf_index = inst->target; - - gfx9_fb_READ(p, dst, payload, surf_index, - inst->header_size, inst->size_written / REG_SIZE, - prog_data->persample_dispatch); -} - void fs_generator::generate_mov_indirect(fs_inst *inst, struct brw_reg dst, @@ -1286,11 +1272,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, brw_MOV_reloc_imm(p, dst, dst.type, src[0].ud); break; - case FS_OPCODE_FB_READ: - generate_fb_read(inst, dst, src[0]); - send_count++; - break; - case BRW_OPCODE_HALT: generate_halt(inst); break; diff --git a/src/intel/compiler/brw_ir_performance.cpp b/src/intel/compiler/brw_ir_performance.cpp index 34efa3e6645..0cae421fa08 100644 --- a/src/intel/compiler/brw_ir_performance.cpp +++ b/src/intel/compiler/brw_ir_performance.cpp @@ -575,10 +575,6 @@ namespace { abort(); } - case FS_OPCODE_FB_READ: - return calculate_desc(info, EU_UNIT_DP_RC, 2, 0, 0, 0, 450 /* XXX */, - 10 /* XXX */, 300 /* XXX */, 0, 0, 0, 0); - case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: return calculate_desc(info, EU_UNIT_DP_CC, 2, 0, 0, 0, 16 /* XXX */, 10 /* XXX */, 100 /* XXX */, 0, 0, 0, 0); diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index 63d6f8b97ab..8b05c402c4b 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -514,7 +514,8 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst, } static void -lower_fb_read_logical_send(const fs_builder &bld, fs_inst *inst) +lower_fb_read_logical_send(const fs_builder &bld, fs_inst *inst, + const struct brw_wm_prog_data *wm_prog_data) { const intel_device_info *devinfo = bld.shader->devinfo; const fs_builder &ubld = bld.exec_all().group(8, 0); @@ -562,11 +563,21 @@ lower_fb_read_logical_send(const fs_builder &bld, fs_inst *inst) component(header, 0), brw_imm_ud(~INTEL_MASK(14, 11))); - inst->resize_sources(1); - inst->src[0] = header; - inst->opcode = FS_OPCODE_FB_READ; + inst->resize_sources(4); + inst->opcode = SHADER_OPCODE_SEND; + inst->src[0] = brw_imm_ud(0); + inst->src[1] = brw_imm_ud(0); + inst->src[2] = header; + inst->src[3] = fs_reg(); inst->mlen = length; inst->header_size = length; + inst->sfid = GFX6_SFID_DATAPORT_RENDER_CACHE; + inst->check_tdr = true; + inst->desc = + (inst->group / 16) << 11 | /* rt slot group */ + brw_fb_read_desc(devinfo, inst->target, + 0 /* msg_control */, inst->exec_size, + wm_prog_data->persample_dispatch); } static bool @@ -2765,7 +2776,7 @@ brw_fs_lower_logical_sends(fs_visitor &s) break; case FS_OPCODE_FB_READ_LOGICAL: - lower_fb_read_logical_send(ibld, inst); + lower_fb_read_logical_send(ibld, inst, brw_wm_prog_data(s.prog_data)); break; case SHADER_OPCODE_TEX_LOGICAL: