From 127941ef1b3150699660be98ce4fcf8e4b87ddd6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pavel=20Ondra=C4=8Dka?= Date: Wed, 14 Jun 2023 08:42:30 +0200 Subject: [PATCH] r300: remove unused FLR lowering Reviewed-by: Emma Anholt Reviewed-by: Filip Gawin Part-of: --- src/gallium/drivers/r300/compiler/radeon_opcodes.c | 7 ------- src/gallium/drivers/r300/compiler/radeon_opcodes.h | 3 --- .../drivers/r300/compiler/radeon_program_alu.c | 14 +------------- src/gallium/drivers/r300/r300_tgsi_to_rc.c | 1 - 4 files changed, 1 insertion(+), 24 deletions(-) diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.c b/src/gallium/drivers/r300/compiler/radeon_opcodes.c index 818b30737fd..1458d03aac6 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.c +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.c @@ -132,13 +132,6 @@ const struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = { .NumSrcRegs = 1, .HasDstReg = 1 }, - { - .Opcode = RC_OPCODE_FLR, - .Name = "FLR", - .NumSrcRegs = 1, - .HasDstReg = 1, - .IsComponentwise = 1 - }, { .Opcode = RC_OPCODE_FRC, .Name = "FRC", diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.h b/src/gallium/drivers/r300/compiler/radeon_opcodes.h index 5459561f4be..88d6f212ba2 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.h +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.h @@ -83,9 +83,6 @@ typedef enum { /** special instruction, see ARB_vertex_program */ RC_OPCODE_EXP, - /** vec4 instruction: dst.c = floor(src0.c) */ - RC_OPCODE_FLR, - /** vec4 instruction: dst.c = src0.c - floor(src0.c) */ RC_OPCODE_FRC, diff --git a/src/gallium/drivers/r300/compiler/radeon_program_alu.c b/src/gallium/drivers/r300/compiler/radeon_program_alu.c index 8e8c29a45da..c4e0f7fb14e 100644 --- a/src/gallium/drivers/r300/compiler/radeon_program_alu.c +++ b/src/gallium/drivers/r300/compiler/radeon_program_alu.c @@ -231,16 +231,6 @@ static void transform_DST(struct radeon_compiler* c, rc_remove_instruction(inst); } -static void transform_FLR(struct radeon_compiler* c, - struct rc_instruction* inst) -{ - struct rc_dst_register dst = new_dst_reg(c, inst); - emit1(c, inst->Prev, RC_OPCODE_FRC, NULL, dst, inst->U.I.SrcReg[0]); - emit2(c, inst->Prev, RC_OPCODE_ADD, &inst->U.I, inst->U.I.DstReg, - inst->U.I.SrcReg[0], negate(srcreg(RC_FILE_TEMPORARY, dst.Index))); - rc_remove_instruction(inst); -} - static void transform_TRUNC(struct radeon_compiler* c, struct rc_instruction* inst) { @@ -524,7 +514,7 @@ static void transform_KILP(struct radeon_compiler * c, * no userData necessary. * * Eliminates the following ALU instructions: - * DST, FLR, LIT, LRP, POW, SEQ, SGE, SGT, SLE, SLT, SNE, SUB + * DST, LIT, LRP, POW, SEQ, SGE, SGT, SLE, SLT, SNE, SUB * using: * MOV, ADD, MUL, MAD, FRC, DP3, LG2, EX2, CMP * @@ -541,7 +531,6 @@ int radeonTransformALU( switch(inst->U.I.Opcode) { case RC_OPCODE_DP2: transform_DP2(c, inst); return 1; case RC_OPCODE_DST: transform_DST(c, inst); return 1; - case RC_OPCODE_FLR: transform_FLR(c, inst); return 1; case RC_OPCODE_KILP: transform_KILP(c, inst); return 1; case RC_OPCODE_LIT: transform_LIT(c, inst); return 1; case RC_OPCODE_LRP: transform_LRP(c, inst); return 1; @@ -733,7 +722,6 @@ int r300_transform_vertex_alu( case RC_OPCODE_CMP: transform_r300_vertex_CMP(c, inst); return 1; case RC_OPCODE_DP2: transform_r300_vertex_DP2(c, inst); return 1; case RC_OPCODE_DP3: transform_r300_vertex_DP3(c, inst); return 1; - case RC_OPCODE_FLR: transform_FLR(c, inst); return 1; case RC_OPCODE_LIT: transform_r300_vertex_fix_LIT(c, inst); return 1; case RC_OPCODE_LRP: transform_LRP(c, inst); return 1; case RC_OPCODE_SEQ: diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c index d5b1f0ab94f..aa8e9c42589 100644 --- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -54,7 +54,6 @@ static unsigned translate_opcode(unsigned opcode) case TGSI_OPCODE_MAD: return RC_OPCODE_MAD; case TGSI_OPCODE_LRP: return RC_OPCODE_LRP; case TGSI_OPCODE_FRC: return RC_OPCODE_FRC; - case TGSI_OPCODE_FLR: return RC_OPCODE_FLR; case TGSI_OPCODE_ROUND: return RC_OPCODE_ROUND; case TGSI_OPCODE_EX2: return RC_OPCODE_EX2; case TGSI_OPCODE_LG2: return RC_OPCODE_LG2;