From 110e474b4f4207d8d8521ec22406a5d5914b860a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 25 Dec 2024 12:44:59 -0500 Subject: [PATCH] amd: lower load_sample_id in NIR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Timur Kristóf Part-of: --- src/amd/common/ac_nir.c | 3 +++ src/amd/compiler/aco_instruction_selection.cpp | 5 ----- src/amd/compiler/aco_instruction_selection_setup.cpp | 1 - src/amd/llvm/ac_nir_to_llvm.c | 3 --- 4 files changed, 3 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_nir.c b/src/amd/common/ac_nir.c index c3109866478..f9dc654f706 100644 --- a/src/amd/common/ac_nir.c +++ b/src/amd/common/ac_nir.c @@ -247,6 +247,9 @@ lower_intrinsic_to_arg(nir_builder *b, nir_instr *instr, void *state) unreachable("unexpected shader stage"); } break; + case nir_intrinsic_load_sample_id: + replacement = ac_nir_unpack_arg(b, s->args, s->args->ancillary, 8, 4); + break; default: return false; } diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 73e037c6d33..967a0c400ce 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8547,11 +8547,6 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) set_wqm(ctx); break; } - case nir_intrinsic_load_sample_id: { - bld.vop3(aco_opcode::v_bfe_u32, Definition(get_ssa_temp(ctx, &instr->def)), - get_arg(ctx, ctx->args->ancillary), Operand::c32(8u), Operand::c32(4u)); - break; - } case nir_intrinsic_read_first_invocation: { Temp src = get_ssa_temp(ctx, instr->src[0].ssa); Temp dst = get_ssa_temp(ctx, &instr->def); diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index 407e4c71ab8..2f96770657c 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -543,7 +543,6 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd: case nir_intrinsic_load_smem_amd: case nir_intrinsic_unit_test_uniform_amd: type = RegType::sgpr; break; - case nir_intrinsic_load_sample_id: case nir_intrinsic_load_input: case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_output: diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index b75b47a354c..3c78cdaeef8 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -2969,9 +2969,6 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins } else fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage); break; - case nir_intrinsic_load_sample_id: - result = ac_unpack_param(&ctx->ac, ac_get_arg(&ctx->ac, ctx->args->ancillary), 8, 4); - break; case nir_intrinsic_load_sample_pos: result = load_sample_pos(ctx); break;