From 10ed4f1cab244ca7100a139cdd2b2030b046ac11 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 28 Nov 2023 02:05:33 -0800 Subject: [PATCH] intel/nir: Pass devinfo and prog_data to brw_nir_lower_cs_intrinsics We'll want to check for Alchemist and set various prog_data fields in the next patch, in order to enable some optimizations. Passing NULL for prog_data will remain valid and continue working as before. Reviewed-by: Ivan Briano Part-of: --- src/gallium/drivers/crocus/crocus_program.c | 2 +- src/gallium/drivers/iris/iris_program.c | 2 +- src/intel/blorp/blorp.c | 3 ++- src/intel/compiler/brw_kernel.c | 2 +- src/intel/compiler/brw_nir.h | 4 +++- .../compiler/brw_nir_lower_cs_intrinsics.c | 4 +++- src/intel/compiler/brw_nir_rt.c | 2 +- src/intel/vulkan/anv_internal_kernels.c | 18 ++++++++++-------- src/intel/vulkan/anv_pipeline.c | 6 ++++-- src/intel/vulkan_hasvk/anv_pipeline.c | 6 ++++-- 10 files changed, 30 insertions(+), 19 deletions(-) diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c index a2c6ac81fa2..16cdd675320 100644 --- a/src/gallium/drivers/crocus/crocus_program.c +++ b/src/gallium/drivers/crocus/crocus_program.c @@ -2513,7 +2513,7 @@ crocus_compile_cs(struct crocus_context *ice, nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir); - NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics); + NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, devinfo, cs_prog_data); crocus_setup_uniforms(devinfo, mem_ctx, nir, prog_data, &system_values, &num_system_values, &num_cbufs); diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index 635fd4ffdbe..600d95fa6b8 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -2224,7 +2224,7 @@ iris_compile_cs(struct iris_screen *screen, nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir); const struct iris_cs_prog_key *const key = &shader->key.cs; - NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics); + NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, devinfo, cs_prog_data); iris_setup_uniforms(devinfo, mem_ctx, nir, prog_data, ish->kernel_input_size, diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 848cdc2af86..716056e5f0f 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -383,7 +383,8 @@ blorp_compile_cs(struct blorp_context *blorp, void *mem_ctx, cs_prog_data->base.nr_params = nr_params; cs_prog_data->base.param = rzalloc_array(NULL, uint32_t, nr_params); - NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics); + NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, compiler->devinfo, + cs_prog_data); NIR_PASS_V(nir, nir_shader_intrinsics_pass, lower_base_workgroup_id, nir_metadata_block_index | nir_metadata_dominance, NULL); diff --git a/src/intel/compiler/brw_kernel.c b/src/intel/compiler/brw_kernel.c index 50bdfe27d3c..bb16dfea518 100644 --- a/src/intel/compiler/brw_kernel.c +++ b/src/intel/compiler/brw_kernel.c @@ -426,7 +426,7 @@ brw_kernel_from_spirv(struct brw_compiler *compiler, NIR_PASS_V(nir, nir_lower_convert_alu_types, NULL); - NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics); + NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, devinfo, NULL); NIR_PASS_V(nir, lower_kernel_intrinsics); struct brw_cs_prog_key key = { }; diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index 119de1c6086..dede5a2c779 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -169,7 +169,9 @@ void brw_nir_link_shaders(const struct brw_compiler *compiler, nir_shader *producer, nir_shader *consumer); -bool brw_nir_lower_cs_intrinsics(nir_shader *nir); +bool brw_nir_lower_cs_intrinsics(nir_shader *nir, + const struct intel_device_info *devinfo, + struct brw_cs_prog_data *prog_data); bool brw_nir_lower_alpha_to_coverage(nir_shader *shader, const struct brw_wm_prog_key *key, const struct brw_wm_prog_data *prog_data); diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c index 9088194986f..b01742687a4 100644 --- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c @@ -275,7 +275,9 @@ lower_cs_intrinsics_convert_impl(struct lower_intrinsics_state *state) } bool -brw_nir_lower_cs_intrinsics(nir_shader *nir) +brw_nir_lower_cs_intrinsics(nir_shader *nir, + const struct intel_device_info *devinfo, + struct brw_cs_prog_data *prog_data) { assert(gl_shader_stage_uses_workgroup(nir->info.stage)); diff --git a/src/intel/compiler/brw_nir_rt.c b/src/intel/compiler/brw_nir_rt.c index ac9d76ac43d..792c39b9129 100644 --- a/src/intel/compiler/brw_nir_rt.c +++ b/src/intel/compiler/brw_nir_rt.c @@ -525,7 +525,7 @@ brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler, } } - NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics); + NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, devinfo, NULL); const bool is_scalar = true; brw_nir_optimize(nir, is_scalar, devinfo); diff --git a/src/intel/vulkan/anv_internal_kernels.c b/src/intel/vulkan/anv_internal_kernels.c index eb9a29339a5..02a856450d6 100644 --- a/src/intel/vulkan/anv_internal_kernels.c +++ b/src/intel/vulkan/anv_internal_kernels.c @@ -228,19 +228,21 @@ compile_upload_spirv(struct anv_device *device, NIR_PASS_V(nir, nir_opt_constant_folding); NIR_PASS_V(nir, nir_opt_dce); - if (stage == MESA_SHADER_COMPUTE) { - NIR_PASS_V(nir, nir_shader_intrinsics_pass, lower_load_ubo_to_uniforms, - nir_metadata_block_index | nir_metadata_dominance, - NULL); - NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics); - nir->num_uniforms = bind_map->push_data_size; - } - union brw_any_prog_key key; memset(&key, 0, sizeof(key)); union brw_any_prog_data prog_data; memset(&prog_data, 0, sizeof(prog_data)); + + if (stage == MESA_SHADER_COMPUTE) { + NIR_PASS_V(nir, nir_shader_intrinsics_pass, lower_load_ubo_to_uniforms, + nir_metadata_block_index | nir_metadata_dominance, + NULL); + NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, device->info, + &prog_data.cs); + nir->num_uniforms = bind_map->push_data_size; + } + prog_data.base.nr_params = nir->num_uniforms / 4; brw_nir_analyze_ubo_ranges(compiler, nir, prog_data.base.ubo_ranges); diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 16304960e22..5c13f2b3828 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1167,8 +1167,10 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, } if (gl_shader_stage_is_compute(nir->info.stage) || - gl_shader_stage_is_mesh(nir->info.stage)) - NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics); + gl_shader_stage_is_mesh(nir->info.stage)) { + NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics, compiler->devinfo, + &stage->prog_data.cs); + } stage->push_desc_info.used_set_buffer = anv_nir_loads_push_desc_buffer(nir, layout, &stage->bind_map); diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 030ea7f2814..8c2b2d6db8f 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -639,8 +639,10 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, } } - if (gl_shader_stage_is_compute(nir->info.stage)) - NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics); + if (gl_shader_stage_is_compute(nir->info.stage)) { + NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics, compiler->devinfo, + &stage->prog_data.cs); + } stage->nir = nir; }