ir3: Don't use swz with shared registers

It seems the two moves it decomposes into aren't always atomically
executed on the scalar ALU, which means that it randomly doesn't work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075>

src/freedreno/ir3/ir3_lower_parallelcopy.c

@@ -154,11 +154,7 @@ do_swap(struct ir3_compiler *compiler, struct ir3_instruction *instr,
    /* a5xx+ is known to support swz, which enables us to swap two registers
     * in-place. If unsupported we emulate it using the xor trick.
     */
-   if (compiler->gen < 5) {
-      /* Shared regs only exist since a5xx, so we don't have to provide a
-       * fallback path for them.
-       */
-      assert(!(entry->flags & IR3_REG_SHARED));
+   if (compiler->gen < 5 || (entry->flags & IR3_REG_SHARED)) {
       do_xor(instr, dst_num, dst_num, src_num, entry->flags);
       do_xor(instr, src_num, src_num, dst_num, entry->flags);
       do_xor(instr, dst_num, dst_num, src_num, entry->flags);