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intel/compiler: Basic support for DP4A instruction

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v2: Very significant rebase on changes to previous commits.
Specifically, brw_fs_nir.cpp changes were pretty much rewritten from
scratch after changing the NIR opcode names and types.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12142>
This commit is contained in:
Ian Romanick
2021-02-23 18:46:53 -08:00
committed by Marge Bot
parent 806cd2341c
commit 0f809dbf40
11 changed files with 67 additions and 0 deletions
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src/intel/compiler/brw_fs_nir.cpp
+33
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@@ -1885,6 +1885,39 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
bld.emit(FS_OPCODE_PACK_HALF_2x16_SPLIT, result, op[0], op[1]);
break;
case nir_op_sdot_4x8_iadd:
case nir_op_sdot_4x8_iadd_sat:
inst = bld.DP4A(result,
retype(op[2], BRW_REGISTER_TYPE_D),
retype(op[0], BRW_REGISTER_TYPE_D),
retype(op[1], BRW_REGISTER_TYPE_D));
if (instr->op == nir_op_sdot_4x8_iadd_sat)
inst->saturate = true;
break;
case nir_op_udot_4x8_uadd:
case nir_op_udot_4x8_uadd_sat:
inst = bld.DP4A(result,
retype(op[2], BRW_REGISTER_TYPE_UD),
retype(op[0], BRW_REGISTER_TYPE_UD),
retype(op[1], BRW_REGISTER_TYPE_UD));
if (instr->op == nir_op_udot_4x8_uadd_sat)
inst->saturate = true;
break;
case nir_op_sudot_4x8_iadd:
case nir_op_sudot_4x8_iadd_sat:
inst = bld.DP4A(result,
retype(op[2], BRW_REGISTER_TYPE_D),
retype(op[0], BRW_REGISTER_TYPE_D),
retype(op[1], BRW_REGISTER_TYPE_UD));
if (instr->op == nir_op_sudot_4x8_iadd_sat)
inst->saturate = true;
break;
case nir_op_ffma:
if (nir_has_any_rounding_mode_enabled(execution_mode)) {
brw_rnd_mode rnd =