From 0dc2a5808ebd1b6bc39ead4bd530a9605820ce40 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Thu, 5 Dec 2024 15:11:07 -0800 Subject: [PATCH] brw: don't forget the base when emitting SHADER_OPCODE_MOV_RELOC_IMM The last argument seems to be used as brw_shader_reloc::delta (from brw_add_reloc), and we're unconditionally setting it to 0 here, while the other place where we handle nir_intrinsic_load_reloc_const_intel seems to be setting the base appropriately. I found this by inspection while debugging a bug related to this code, so I'm not aware of any workloads that get improved by this patch. Related patches: - ecbec25e8462 ("intel/nir: add reloc delta to load_reloc_const_intel intrinsic") - 99047451c913 ("intel/fs: add plumbing for embedded samplers") Fixes: ecbec25e8462 ("intel/nir: add reloc delta to load_reloc_const_intel intrinsic") Reviewed-by: Lionel Landwerlin Signed-off-by: Paulo Zanoni Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 8506dae93b1..09f6b3c3f8d 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4936,10 +4936,11 @@ try_rebuild_source(nir_to_brw_state &ntb, const brw::fs_builder &bld, case nir_intrinsic_load_reloc_const_intel: { uint32_t id = nir_intrinsic_param_idx(intrin); + uint32_t base = nir_intrinsic_base(intrin); brw_reg dst = ubld.vgrf(BRW_TYPE_D); ntb.resource_insts[def->index] = ubld.emit(SHADER_OPCODE_MOV_RELOC_IMM, dst, - brw_imm_ud(id), brw_imm_ud(0)); + brw_imm_ud(id), brw_imm_ud(base)); break; }