From 0ba5d99a61f1cd97d8d203e7bb1bd77d501ba9da Mon Sep 17 00:00:00 2001 From: Lorenzo Rossi Date: Sun, 23 Mar 2025 20:08:04 +0100 Subject: [PATCH] nak: Simplify shl64 lowering on Maxwell Signed-off-by: Lorenzo Rossi Reviewed-by: Mel Henning Part-of: --- src/nouveau/compiler/nak/builder.rs | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/src/nouveau/compiler/nak/builder.rs b/src/nouveau/compiler/nak/builder.rs index 54a1febb8b0..0aa868ce7d7 100644 --- a/src/nouveau/compiler/nak/builder.rs +++ b/src/nouveau/compiler/nak/builder.rs @@ -161,21 +161,16 @@ pub trait SSABuilder: Builder { }); } else { // On Maxwell and earlier, shf.l doesn't work without .high so we - // have to use a regular 32-bit shift here. 32-bit shift doesn't - // have the NIR wrap semantics so we need to wrap manually. - let shift = if let SrcRef::Imm32(imm) = shift.src_ref { - (imm & 0x3f).into() - } else { - self.lop2(LogicOp2::And, shift, 0x3f.into()).into() - }; + // have to use only the high parts, hard-coding the lower parts + // to rZ self.push_op(OpShf { dst: dst[0].into(), low: 0.into(), high: x[0].into(), shift, right: false, - wrap: false, - data_type: IntType::U32, + wrap: true, + data_type: IntType::U64, dst_high: true, }); }