intel: Rename i965_{asm,disasm} tools to brw_{asm,disasm}
And move them inside the compiler since they (especially asm) rely on a bunch of internal types. Acked-by: Dylan Baker <dylan@pnwbakers.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27579>
This commit is contained in:
Caio Oliveira
@@ -1,385 +0,0 @@
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/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
|
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* to deal in the Software without restriction, including without limitation
|
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <stdio.h>
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#include <getopt.h>
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#include "i965_asm.h"
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#include "intel/compiler/brw_disasm_info.h"
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enum opt_output_type {
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OPT_OUTPUT_HEX,
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OPT_OUTPUT_C_LITERAL,
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OPT_OUTPUT_BIN,
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};
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extern FILE *yyin;
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struct brw_codegen *p;
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static enum opt_output_type output_type = OPT_OUTPUT_BIN;
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char *input_filename = NULL;
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int errors;
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struct list_head instr_labels;
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struct list_head target_labels;
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static void
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print_help(const char *progname, FILE *file)
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{
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fprintf(file,
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"Usage: %s [OPTION] inputfile\n"
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"Assemble i965 instructions from input file.\n\n"
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" -h, --help display this help and exit\n"
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" -t, --type=OUTPUT_TYPE OUTPUT_TYPE can be 'bin' (default if omitted),\n"
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" 'c_literal', or 'hex'\n"
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" -o, --output specify output file\n"
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" --compact print compacted instructions\n"
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" -g, --gen=platform assemble instructions for given \n"
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" platform (3 letter platform name)\n"
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"Example:\n"
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" i965_asm -g kbl input.asm -t hex -o output\n",
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progname);
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}
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static uint32_t
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get_dword(const brw_inst *inst, int idx)
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{
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uint32_t dword;
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memcpy(&dword, (char *)inst + 4 * idx, sizeof(dword));
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return dword;
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}
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static void
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print_instruction(FILE *output, bool compact, const brw_inst *instruction)
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{
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int byte_limit;
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byte_limit = (compact == true) ? 8 : 16;
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switch (output_type) {
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case OPT_OUTPUT_HEX: {
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fprintf(output, "%02x", ((unsigned char *)instruction)[0]);
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for (unsigned i = 1; i < byte_limit; i++) {
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fprintf(output, " %02x", ((unsigned char *)instruction)[i]);
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}
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break;
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}
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case OPT_OUTPUT_C_LITERAL: {
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fprintf(output, "\t0x%08x,", get_dword(instruction, 0));
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for (unsigned i = 1; i < byte_limit / 4; i++)
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fprintf(output, " 0x%08x,", get_dword(instruction, i));
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break;
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}
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case OPT_OUTPUT_BIN:
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fwrite(instruction, 1, byte_limit, output);
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break;
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}
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if (output_type != OPT_OUTPUT_BIN) {
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fprintf(output, "\n");
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}
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}
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static struct intel_device_info *
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i965_disasm_init(uint16_t pci_id)
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{
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struct intel_device_info *devinfo;
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devinfo = malloc(sizeof *devinfo);
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if (devinfo == NULL)
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return NULL;
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if (!intel_get_device_info_from_pci_id(pci_id, devinfo)) {
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fprintf(stderr, "can't find device information: pci_id=0x%x\n",
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pci_id);
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free(devinfo);
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return NULL;
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}
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return devinfo;
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}
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static bool
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i965_postprocess_labels()
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{
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if (p->devinfo->ver < 6) {
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return true;
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}
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void *store = p->store;
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struct target_label *tlabel;
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struct instr_label *ilabel, *s;
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const unsigned to_bytes_scale = brw_jump_scale(p->devinfo);
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LIST_FOR_EACH_ENTRY(tlabel, &target_labels, link) {
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LIST_FOR_EACH_ENTRY_SAFE(ilabel, s, &instr_labels, link) {
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if (!strcmp(tlabel->name, ilabel->name)) {
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brw_inst *inst = store + ilabel->offset;
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int relative_offset = (tlabel->offset - ilabel->offset) / sizeof(brw_inst);
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relative_offset *= to_bytes_scale;
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unsigned opcode = brw_inst_opcode(p->isa, inst);
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if (ilabel->type == INSTR_LABEL_JIP) {
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switch (opcode) {
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case BRW_OPCODE_IF:
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case BRW_OPCODE_ELSE:
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case BRW_OPCODE_ENDIF:
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case BRW_OPCODE_WHILE:
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if (p->devinfo->ver >= 7) {
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brw_inst_set_jip(p->devinfo, inst, relative_offset);
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} else if (p->devinfo->ver == 6) {
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brw_inst_set_gfx6_jump_count(p->devinfo, inst, relative_offset);
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}
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break;
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case BRW_OPCODE_BREAK:
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case BRW_OPCODE_HALT:
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case BRW_OPCODE_CONTINUE:
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brw_inst_set_jip(p->devinfo, inst, relative_offset);
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break;
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default:
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fprintf(stderr, "Unknown opcode %d with JIP label\n", opcode);
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return false;
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}
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} else {
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switch (opcode) {
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case BRW_OPCODE_IF:
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case BRW_OPCODE_ELSE:
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if (p->devinfo->ver > 7) {
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brw_inst_set_uip(p->devinfo, inst, relative_offset);
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} else if (p->devinfo->ver == 7) {
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brw_inst_set_uip(p->devinfo, inst, relative_offset);
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} else if (p->devinfo->ver == 6) {
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// Nothing
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}
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break;
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case BRW_OPCODE_WHILE:
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case BRW_OPCODE_ENDIF:
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fprintf(stderr, "WHILE/ENDIF cannot have UIP offset\n");
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return false;
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case BRW_OPCODE_BREAK:
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case BRW_OPCODE_CONTINUE:
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case BRW_OPCODE_HALT:
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brw_inst_set_uip(p->devinfo, inst, relative_offset);
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break;
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default:
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fprintf(stderr, "Unknown opcode %d with UIP label\n", opcode);
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return false;
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}
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}
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list_del(&ilabel->link);
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}
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}
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}
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LIST_FOR_EACH_ENTRY(ilabel, &instr_labels, link) {
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fprintf(stderr, "Unknown label '%s'\n", ilabel->name);
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}
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return list_is_empty(&instr_labels);
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}
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int main(int argc, char **argv)
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{
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char *output_file = NULL;
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char c;
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FILE *output = stdout;
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bool help = false, compact = false;
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void *store;
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uint64_t pci_id = 0;
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int offset = 0, err;
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int start_offset = 0;
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struct disasm_info *disasm_info;
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struct intel_device_info *devinfo = NULL;
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int result = EXIT_FAILURE;
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list_inithead(&instr_labels);
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list_inithead(&target_labels);
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const struct option i965_asm_opts[] = {
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{ "help", no_argument, (int *) &help, true },
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{ "type", required_argument, NULL, 't' },
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{ "gen", required_argument, NULL, 'g' },
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{ "output", required_argument, NULL, 'o' },
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{ "compact", no_argument, (int *) &compact, true },
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{ NULL, 0, NULL, 0 }
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};
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while ((c = getopt_long(argc, argv, ":t:g:o:h", i965_asm_opts, NULL)) != -1) {
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switch (c) {
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case 'g': {
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const int id = intel_device_name_to_pci_device_id(optarg);
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if (id < 0) {
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fprintf(stderr, "can't parse gen: '%s', expected 3 letter "
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"platform name\n", optarg);
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goto end;
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} else {
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pci_id = id;
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}
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break;
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}
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case 'h':
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help = true;
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print_help(argv[0], stderr);
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goto end;
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case 't': {
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if (strcmp(optarg, "hex") == 0) {
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output_type = OPT_OUTPUT_HEX;
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} else if (strcmp(optarg, "c_literal") == 0) {
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output_type = OPT_OUTPUT_C_LITERAL;
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} else if (strcmp(optarg, "bin") == 0) {
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output_type = OPT_OUTPUT_BIN;
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} else {
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fprintf(stderr, "invalid value for --type: %s\n", optarg);
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goto end;
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}
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break;
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}
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case 'o':
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output_file = strdup(optarg);
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break;
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case 0:
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break;
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case ':':
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fprintf(stderr, "%s: option `-%c' requires an argument\n",
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argv[0], optopt);
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goto end;
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case '?':
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default:
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fprintf(stderr, "%s: option `-%c' is invalid: ignored\n",
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argv[0], optopt);
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goto end;
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}
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}
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if (help || !pci_id) {
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print_help(argv[0], stderr);
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goto end;
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}
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if (!argv[optind]) {
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fprintf(stderr, "Please specify input file\n");
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goto end;
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}
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input_filename = strdup(argv[optind]);
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yyin = fopen(input_filename, "r");
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if (!yyin) {
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fprintf(stderr, "Unable to read input file : %s\n",
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input_filename);
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goto end;
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}
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if (output_file) {
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output = fopen(output_file, "w");
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if (!output) {
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fprintf(stderr, "Couldn't open output file\n");
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goto end;
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}
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}
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devinfo = i965_disasm_init(pci_id);
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if (!devinfo) {
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fprintf(stderr, "Unable to allocate memory for "
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"intel_device_info struct instance.\n");
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goto end;
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}
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struct brw_isa_info isa;
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brw_init_isa_info(&isa, devinfo);
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p = rzalloc(NULL, struct brw_codegen);
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brw_init_codegen(&isa, p, p);
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p->automatic_exec_sizes = false;
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err = yyparse();
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if (err || errors)
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goto end;
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if (!i965_postprocess_labels())
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goto end;
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store = p->store;
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disasm_info = disasm_initialize(p->isa, NULL);
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if (!disasm_info) {
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fprintf(stderr, "Unable to initialize disasm_info struct instance\n");
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goto end;
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}
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if (output_type == OPT_OUTPUT_C_LITERAL)
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fprintf(output, "{\n");
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brw_validate_instructions(p->isa, p->store, 0,
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p->next_insn_offset, disasm_info);
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const int nr_insn = (p->next_insn_offset - start_offset) / 16;
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if (compact)
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brw_compact_instructions(p, start_offset, disasm_info);
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for (int i = 0; i < nr_insn; i++) {
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const brw_inst *insn = store + offset;
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bool compacted = false;
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if (compact && brw_inst_cmpt_control(p->devinfo, insn)) {
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offset += 8;
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compacted = true;
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} else {
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offset += 16;
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}
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print_instruction(output, compacted, insn);
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}
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ralloc_free(disasm_info);
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if (output_type == OPT_OUTPUT_C_LITERAL)
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fprintf(output, "}");
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result = EXIT_SUCCESS;
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goto end;
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end:
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free(input_filename);
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free(output_file);
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if (yyin)
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fclose(yyin);
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if (output)
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fclose(output);
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if (p)
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ralloc_free(p);
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if (devinfo)
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free(devinfo);
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exit(result);
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}
|
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@@ -1,122 +0,0 @@
|
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/*
|
||||
* Copyright © 2018 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __I965_ASM_H__
|
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#define __I965_ASM_H__
|
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|
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#include <inttypes.h>
|
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#include <stdbool.h>
|
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#include <assert.h>
|
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|
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#include "compiler/brw_reg.h"
|
||||
#include "compiler/brw_reg_type.h"
|
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#include "compiler/brw_eu_defines.h"
|
||||
#include "compiler/brw_inst.h"
|
||||
#include "compiler/brw_eu.h"
|
||||
#include "dev/intel_device_info.h"
|
||||
#include "util/list.h"
|
||||
|
||||
/* glibc < 2.27 defines OVERFLOW in /usr/include/math.h. */
|
||||
#undef OVERFLOW
|
||||
|
||||
int yyparse(void);
|
||||
int yylex(void);
|
||||
char *lex_text(void);
|
||||
|
||||
extern struct brw_codegen *p;
|
||||
extern int errors;
|
||||
extern char *input_filename;
|
||||
|
||||
extern struct list_head instr_labels;
|
||||
extern struct list_head target_labels;
|
||||
|
||||
struct condition {
|
||||
unsigned cond_modifier:4;
|
||||
unsigned flag_reg_nr:1;
|
||||
unsigned flag_subreg_nr:1;
|
||||
};
|
||||
|
||||
struct predicate {
|
||||
unsigned pred_control:4;
|
||||
unsigned pred_inv:1;
|
||||
unsigned flag_reg_nr:1;
|
||||
unsigned flag_subreg_nr:1;
|
||||
};
|
||||
|
||||
enum instoption_type {
|
||||
INSTOPTION_FLAG,
|
||||
INSTOPTION_DEP_INFO,
|
||||
};
|
||||
|
||||
struct instoption {
|
||||
enum instoption_type type;
|
||||
union {
|
||||
unsigned uint_value;
|
||||
struct tgl_swsb depinfo_value;
|
||||
};
|
||||
};
|
||||
|
||||
struct options {
|
||||
unsigned access_mode:1;
|
||||
unsigned compression_control:2;
|
||||
unsigned thread_control:2;
|
||||
unsigned no_dd_check:1; // Dependency control
|
||||
unsigned no_dd_clear:1; // Dependency control
|
||||
unsigned mask_control:1;
|
||||
unsigned debug_control:1;
|
||||
unsigned acc_wr_control:1;
|
||||
unsigned end_of_thread:1;
|
||||
unsigned compaction:1;
|
||||
unsigned qtr_ctrl:2;
|
||||
unsigned nib_ctrl:1;
|
||||
unsigned is_compr:1;
|
||||
struct tgl_swsb depinfo;
|
||||
};
|
||||
|
||||
struct msgdesc {
|
||||
unsigned ex_bso:1;
|
||||
unsigned src1_len:5;
|
||||
};
|
||||
|
||||
enum instr_label_type {
|
||||
INSTR_LABEL_JIP,
|
||||
INSTR_LABEL_UIP,
|
||||
};
|
||||
|
||||
struct instr_label {
|
||||
struct list_head link;
|
||||
|
||||
char *name;
|
||||
int offset;
|
||||
enum instr_label_type type;
|
||||
};
|
||||
|
||||
struct target_label {
|
||||
struct list_head link;
|
||||
|
||||
char *name;
|
||||
int offset;
|
||||
};
|
||||
|
||||
#endif /* __I965_ASM_H__ */
|
||||
@@ -1,242 +0,0 @@
|
||||
/*
|
||||
* Copyright © 2018 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
||||
* IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <getopt.h>
|
||||
|
||||
#include "compiler/brw_disasm.h"
|
||||
#include "compiler/brw_isa_info.h"
|
||||
#include "dev/intel_device_info.h"
|
||||
#include "util/u_dynarray.h"
|
||||
|
||||
enum opt_input_type {
|
||||
OPT_INPUT_BINARY,
|
||||
OPT_INPUT_C_LITERAL,
|
||||
};
|
||||
|
||||
static enum opt_input_type input_type = OPT_INPUT_BINARY;
|
||||
|
||||
/* Return size of file in bytes pointed by fp */
|
||||
static long
|
||||
i965_disasm_get_file_size(FILE *fp)
|
||||
{
|
||||
long size;
|
||||
|
||||
fseek(fp, 0L, SEEK_END);
|
||||
size = ftell(fp);
|
||||
fseek(fp, 0L, SEEK_SET);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
/* Read hex file which should be in following format:
|
||||
* for example :
|
||||
* { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }
|
||||
*/
|
||||
static void *
|
||||
i965_disasm_read_c_literal_file(FILE *fp, size_t *end)
|
||||
{
|
||||
struct util_dynarray assembly = {};
|
||||
uint32_t temp[2];
|
||||
|
||||
if (fscanf(fp, " { ") == EOF) {
|
||||
fprintf(stderr, "Couldn't find opening `{`\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (fscanf(fp, "0x%x , 0x%x", &temp[0], &temp[1]) == 2) {
|
||||
util_dynarray_append(&assembly, uint32_t, temp[0]);
|
||||
util_dynarray_append(&assembly, uint32_t, temp[1]);
|
||||
} else {
|
||||
fprintf(stderr, "Couldn't read hex values\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
while (fscanf(fp, " , 0x%x , 0x%x ", &temp[0], &temp[1]) == 2) {
|
||||
util_dynarray_append(&assembly, uint32_t, temp[0]);
|
||||
util_dynarray_append(&assembly, uint32_t, temp[1]);
|
||||
}
|
||||
|
||||
if (fscanf(fp, "}") == EOF) {
|
||||
fprintf(stderr, "Couldn't find closing `}`\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
*end = assembly.size;
|
||||
return assembly.data;
|
||||
}
|
||||
|
||||
static void *
|
||||
i965_disasm_read_binary(FILE *fp, size_t *end)
|
||||
{
|
||||
size_t size;
|
||||
void *assembly;
|
||||
|
||||
long sz = i965_disasm_get_file_size(fp);
|
||||
if (sz < 0)
|
||||
return NULL;
|
||||
|
||||
*end = (size_t)sz;
|
||||
if (!*end)
|
||||
return NULL;
|
||||
|
||||
assembly = malloc(*end + 1);
|
||||
if (assembly == NULL)
|
||||
return NULL;
|
||||
|
||||
size = fread(assembly, *end, 1, fp);
|
||||
if (!size) {
|
||||
free(assembly);
|
||||
return NULL;
|
||||
}
|
||||
return assembly;
|
||||
}
|
||||
|
||||
static void
|
||||
print_help(const char *progname, FILE *file)
|
||||
{
|
||||
fprintf(file,
|
||||
"Usage: %s [OPTION]...\n"
|
||||
"Disassemble i965 instructions from binary file.\n\n"
|
||||
" --help display this help and exit\n"
|
||||
" --input-path=PATH read binary file from binary file PATH\n"
|
||||
" --type=INPUT_TYPE INPUT_TYPE can be 'bin' (default if omitted),\n"
|
||||
" 'c_literal'.\n"
|
||||
" --gen=platform disassemble instructions for given \n"
|
||||
" platform (3 letter platform name)\n",
|
||||
progname);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
FILE *fp = NULL;
|
||||
void *assembly = NULL;
|
||||
char *file_path = NULL;
|
||||
size_t start = 0, end = 0;
|
||||
uint16_t pci_id = 0;
|
||||
int c;
|
||||
int result = EXIT_FAILURE;
|
||||
|
||||
bool help = false;
|
||||
const struct option i965_disasm_opts[] = {
|
||||
{ "help", no_argument, (int *) &help, true },
|
||||
{ "input-path", required_argument, NULL, 'i' },
|
||||
{ "type", required_argument, NULL, 't' },
|
||||
{ "gen", required_argument, NULL, 'g'},
|
||||
{ NULL, 0, NULL, 0 }
|
||||
};
|
||||
|
||||
while ((c = getopt_long(argc, argv, ":i:t:g:h", i965_disasm_opts, NULL)) != -1) {
|
||||
switch (c) {
|
||||
case 'g': {
|
||||
const int id = intel_device_name_to_pci_device_id(optarg);
|
||||
if (id < 0) {
|
||||
fprintf(stderr, "can't parse gen: '%s', expected 3 letter "
|
||||
"platform name\n", optarg);
|
||||
goto end;
|
||||
} else {
|
||||
pci_id = id;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 'i':
|
||||
file_path = strdup(optarg);
|
||||
fp = fopen(file_path, "r");
|
||||
if (!fp) {
|
||||
fprintf(stderr, "Unable to read input file : %s\n",
|
||||
file_path);
|
||||
goto end;
|
||||
}
|
||||
break;
|
||||
case 't':
|
||||
if (strcmp(optarg, "c_literal") == 0) {
|
||||
input_type = OPT_INPUT_C_LITERAL;
|
||||
} else if (strcmp(optarg, "bin") == 0) {
|
||||
input_type = OPT_INPUT_BINARY;
|
||||
} else {
|
||||
fprintf(stderr, "invalid value for --type: %s\n", optarg);
|
||||
goto end;
|
||||
}
|
||||
break;
|
||||
case 'h':
|
||||
help = true;
|
||||
print_help(argv[0], stderr);
|
||||
goto end;
|
||||
case 0:
|
||||
break;
|
||||
case ':':
|
||||
fprintf(stderr, "%s: option `-%c' requires an argument\n",
|
||||
argv[0], optopt);
|
||||
goto end;
|
||||
case '?':
|
||||
default:
|
||||
fprintf(stderr, "%s: option `-%c' is invalid: ignored\n",
|
||||
argv[0], optopt);
|
||||
goto end;
|
||||
}
|
||||
}
|
||||
|
||||
if (help || !file_path || !pci_id) {
|
||||
print_help(argv[0], stderr);
|
||||
exit(0);
|
||||
}
|
||||
|
||||
struct intel_device_info devinfo;
|
||||
if (!intel_get_device_info_from_pci_id(pci_id, &devinfo)) {
|
||||
fprintf(stderr, "can't find device information: pci_id=0x%x\n", pci_id);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
struct brw_isa_info isa;
|
||||
brw_init_isa_info(&isa, &devinfo);
|
||||
|
||||
if (input_type == OPT_INPUT_BINARY)
|
||||
assembly = i965_disasm_read_binary(fp, &end);
|
||||
else if (input_type == OPT_INPUT_C_LITERAL)
|
||||
assembly = i965_disasm_read_c_literal_file(fp, &end);
|
||||
|
||||
if (!assembly) {
|
||||
if (end)
|
||||
fprintf(stderr, "Unable to allocate buffer to read input file\n");
|
||||
else
|
||||
fprintf(stderr, "Failed to read input file\n");
|
||||
|
||||
goto end;
|
||||
}
|
||||
|
||||
/* Disassemble i965 instructions from buffer assembly */
|
||||
brw_disassemble_with_labels(&isa, assembly, start, end, stdout);
|
||||
|
||||
result = EXIT_SUCCESS;
|
||||
|
||||
end:
|
||||
if (fp)
|
||||
fclose(fp);
|
||||
|
||||
free(file_path);
|
||||
free(assembly);
|
||||
|
||||
exit(result);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,465 +0,0 @@
|
||||
%option yylineno
|
||||
%option nounput
|
||||
%{
|
||||
#include <string.h>
|
||||
#include "i965_asm.h"
|
||||
#undef ALIGN16
|
||||
#include "i965_gram.tab.h"
|
||||
|
||||
/* Locations */
|
||||
int yycolumn = 1;
|
||||
|
||||
int saved_state = 0;
|
||||
extern char *input_filename;
|
||||
|
||||
#define YY_NO_INPUT
|
||||
#define YY_USER_ACTION \
|
||||
yylloc.first_line = yylloc.last_line = yylineno; \
|
||||
yylloc.first_column = yycolumn; \
|
||||
yylloc.last_column = yycolumn + yyleng - 1; \
|
||||
yycolumn += yyleng;
|
||||
%}
|
||||
|
||||
%x BLOCK_COMMENT
|
||||
%x FILENAME
|
||||
%x CHANNEL
|
||||
%x REG
|
||||
%x DOTSEL
|
||||
%x LABEL
|
||||
%x MSGDESC
|
||||
%%
|
||||
|
||||
/* eat up single line comment */
|
||||
\/\/.*[\r\n] { yycolumn = 1; }
|
||||
|
||||
/* eat up multiline comment */
|
||||
\/\* { saved_state = YYSTATE; BEGIN(BLOCK_COMMENT); }
|
||||
|
||||
<BLOCK_COMMENT>\*\/ { BEGIN(saved_state); }
|
||||
|
||||
<BLOCK_COMMENT>. { }
|
||||
<BLOCK_COMMENT>[\r\n] { }
|
||||
|
||||
<FILENAME>\"[^\"]+\" {
|
||||
char *name = malloc(yyleng - 1);
|
||||
memmove(name, yytext + 1, yyleng - 2);
|
||||
name[yyleng-1] = '\0';
|
||||
input_filename = name;
|
||||
}
|
||||
|
||||
/* null register */
|
||||
null { BEGIN(REG); return NULL_TOKEN; }
|
||||
|
||||
/* Opcodes */
|
||||
add { yylval.integer = BRW_OPCODE_ADD; return ADD; }
|
||||
add3 { yylval.integer = BRW_OPCODE_ADD3; return ADD3; }
|
||||
addc { yylval.integer = BRW_OPCODE_ADDC; return ADDC; }
|
||||
and { yylval.integer = BRW_OPCODE_AND; return AND; }
|
||||
asr { yylval.integer = BRW_OPCODE_ASR; return ASR; }
|
||||
avg { yylval.integer = BRW_OPCODE_AVG; return AVG; }
|
||||
bfe { yylval.integer = BRW_OPCODE_BFE; return BFE; }
|
||||
bfi1 { yylval.integer = BRW_OPCODE_BFI1; return BFI1; }
|
||||
bfi2 { yylval.integer = BRW_OPCODE_BFI2; return BFI2; }
|
||||
bfrev { yylval.integer = BRW_OPCODE_BFREV; return BFREV; }
|
||||
brc { yylval.integer = BRW_OPCODE_BRC; return BRC; }
|
||||
brd { yylval.integer = BRW_OPCODE_BRD; return BRD; }
|
||||
break { yylval.integer = BRW_OPCODE_BREAK; return BREAK; }
|
||||
call { yylval.integer = BRW_OPCODE_CALL; return CALL; }
|
||||
calla { yylval.integer = BRW_OPCODE_CALLA; return CALLA; }
|
||||
case { yylval.integer = BRW_OPCODE_CASE; return CASE; }
|
||||
cbit { yylval.integer = BRW_OPCODE_CBIT; return CBIT; }
|
||||
cmp { yylval.integer = BRW_OPCODE_CMP; return CMP; }
|
||||
cmpn { yylval.integer = BRW_OPCODE_CMPN; return CMPN; }
|
||||
cont { yylval.integer = BRW_OPCODE_CONTINUE; return CONT; }
|
||||
csel { yylval.integer = BRW_OPCODE_CSEL; return CSEL; }
|
||||
dim { yylval.integer = BRW_OPCODE_DIM; return DIM; }
|
||||
do { yylval.integer = BRW_OPCODE_DO; return DO; }
|
||||
dp2 { yylval.integer = BRW_OPCODE_DP2; return DP2; }
|
||||
dp3 { yylval.integer = BRW_OPCODE_DP3; return DP3; }
|
||||
dp4 { yylval.integer = BRW_OPCODE_DP4; return DP4; }
|
||||
dp4a { yylval.integer = BRW_OPCODE_DP4A; return DP4A; }
|
||||
dph { yylval.integer = BRW_OPCODE_DPH; return DPH; }
|
||||
else { yylval.integer = BRW_OPCODE_ELSE; return ELSE; }
|
||||
endif { yylval.integer = BRW_OPCODE_ENDIF; return ENDIF; }
|
||||
f16to32 { yylval.integer = BRW_OPCODE_F16TO32; return F16TO32; }
|
||||
f32to16 { yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; }
|
||||
fbh { yylval.integer = BRW_OPCODE_FBH; return FBH; }
|
||||
fbl { yylval.integer = BRW_OPCODE_FBL; return FBL; }
|
||||
fork { yylval.integer = BRW_OPCODE_FORK; return FORK; }
|
||||
frc { yylval.integer = BRW_OPCODE_FRC; return FRC; }
|
||||
goto { yylval.integer = BRW_OPCODE_GOTO; return GOTO; }
|
||||
halt { yylval.integer = BRW_OPCODE_HALT; return HALT; }
|
||||
if { yylval.integer = BRW_OPCODE_IF; return IF; }
|
||||
iff { yylval.integer = BRW_OPCODE_IFF; return IFF; }
|
||||
illegal { yylval.integer = BRW_OPCODE_ILLEGAL; return ILLEGAL; }
|
||||
jmpi { yylval.integer = BRW_OPCODE_JMPI; return JMPI; }
|
||||
line { yylval.integer = BRW_OPCODE_LINE; return LINE; }
|
||||
lrp { yylval.integer = BRW_OPCODE_LRP; return LRP; }
|
||||
lzd { yylval.integer = BRW_OPCODE_LZD; return LZD; }
|
||||
mac { yylval.integer = BRW_OPCODE_MAC; return MAC; }
|
||||
mach { yylval.integer = BRW_OPCODE_MACH; return MACH; }
|
||||
mad { yylval.integer = BRW_OPCODE_MAD; return MAD; }
|
||||
madm { yylval.integer = BRW_OPCODE_MADM; return MADM; }
|
||||
mov { yylval.integer = BRW_OPCODE_MOV; return MOV; }
|
||||
movi { yylval.integer = BRW_OPCODE_MOVI; return MOVI; }
|
||||
mul { yylval.integer = BRW_OPCODE_MUL; return MUL; }
|
||||
mrest { yylval.integer = BRW_OPCODE_MREST; return MREST; }
|
||||
msave { yylval.integer = BRW_OPCODE_MSAVE; return MSAVE; }
|
||||
nenop { yylval.integer = BRW_OPCODE_NENOP; return NENOP; }
|
||||
nop { yylval.integer = BRW_OPCODE_NOP; return NOP; }
|
||||
not { yylval.integer = BRW_OPCODE_NOT; return NOT; }
|
||||
or { yylval.integer = BRW_OPCODE_OR; return OR; }
|
||||
pln { yylval.integer = BRW_OPCODE_PLN; return PLN; }
|
||||
pop { yylval.integer = BRW_OPCODE_POP; return POP; }
|
||||
push { yylval.integer = BRW_OPCODE_PUSH; return PUSH; }
|
||||
ret { yylval.integer = BRW_OPCODE_RET; return RET; }
|
||||
rndd { yylval.integer = BRW_OPCODE_RNDD; return RNDD; }
|
||||
rnde { yylval.integer = BRW_OPCODE_RNDE; return RNDE; }
|
||||
rndu { yylval.integer = BRW_OPCODE_RNDU; return RNDU; }
|
||||
rndz { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; }
|
||||
rol { yylval.integer = BRW_OPCODE_ROL; return ROL; }
|
||||
ror { yylval.integer = BRW_OPCODE_ROR; return ROR; }
|
||||
sad2 { yylval.integer = BRW_OPCODE_SAD2; return SAD2; }
|
||||
sada2 { yylval.integer = BRW_OPCODE_SADA2; return SADA2; }
|
||||
sel { yylval.integer = BRW_OPCODE_SEL; return SEL; }
|
||||
send {
|
||||
yylval.integer = BRW_OPCODE_SEND;
|
||||
return p->devinfo->ver < 12 ? SEND_GFX4 : SEND_GFX12;
|
||||
}
|
||||
sendc {
|
||||
yylval.integer = BRW_OPCODE_SENDC;
|
||||
return p->devinfo->ver < 12 ? SENDC_GFX4 : SENDC_GFX12;
|
||||
}
|
||||
sends { yylval.integer = BRW_OPCODE_SENDS; return SENDS; }
|
||||
sendsc { yylval.integer = BRW_OPCODE_SENDSC; return SENDSC; }
|
||||
shl { yylval.integer = BRW_OPCODE_SHL; return SHL; }
|
||||
shr { yylval.integer = BRW_OPCODE_SHR; return SHR; }
|
||||
smov { yylval.integer = BRW_OPCODE_SMOV; return SMOV; }
|
||||
subb { yylval.integer = BRW_OPCODE_SUBB; return SUBB; }
|
||||
wait { yylval.integer = BRW_OPCODE_WAIT; return WAIT; }
|
||||
while { yylval.integer = BRW_OPCODE_WHILE; return WHILE; }
|
||||
xor { yylval.integer = BRW_OPCODE_XOR; return XOR; }
|
||||
sync { yylval.integer = BRW_OPCODE_SYNC; return SYNC; }
|
||||
|
||||
/* extended math functions */
|
||||
cos { yylval.integer = BRW_MATH_FUNCTION_COS; return COS; }
|
||||
exp { yylval.integer = BRW_MATH_FUNCTION_EXP; return EXP; }
|
||||
fdiv { yylval.integer = BRW_MATH_FUNCTION_FDIV; return FDIV; }
|
||||
inv { yylval.integer = BRW_MATH_FUNCTION_INV; return INV; }
|
||||
invm { yylval.integer = GFX8_MATH_FUNCTION_INVM; return INVM; }
|
||||
intdiv {
|
||||
yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
|
||||
return INTDIV;
|
||||
}
|
||||
intdivmod {
|
||||
yylval.integer =
|
||||
BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER;
|
||||
return INTDIVMOD;
|
||||
}
|
||||
intmod {
|
||||
yylval.integer = BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
|
||||
return INTMOD;
|
||||
}
|
||||
log { yylval.integer = BRW_MATH_FUNCTION_LOG; return LOG; }
|
||||
pow { yylval.integer = BRW_MATH_FUNCTION_POW; return POW; }
|
||||
rsq { yylval.integer = BRW_MATH_FUNCTION_RSQ; return RSQ; }
|
||||
rsqrtm { yylval.integer = GFX8_MATH_FUNCTION_RSQRTM; return RSQRTM; }
|
||||
sin { yylval.integer = BRW_MATH_FUNCTION_SIN; return SIN; }
|
||||
sqrt { yylval.integer = BRW_MATH_FUNCTION_SQRT; return SQRT; }
|
||||
sincos { yylval.integer = BRW_MATH_FUNCTION_SINCOS; return SINCOS; }
|
||||
|
||||
/* sync instruction */
|
||||
allrd { yylval.integer = TGL_SYNC_ALLRD; return ALLRD; }
|
||||
allwr { yylval.integer = TGL_SYNC_ALLWR; return ALLWR; }
|
||||
fence { yylval.integer = TGL_SYNC_FENCE; return FENCE; }
|
||||
bar { yylval.integer = TGL_SYNC_BAR; return BAR; }
|
||||
host { yylval.integer = TGL_SYNC_HOST; return HOST; }
|
||||
|
||||
/* shared functions for send instruction */
|
||||
sampler { return SAMPLER; }
|
||||
dp_sampler { return DP_SAMPLER; }
|
||||
gateway { return GATEWAY; }
|
||||
urb { return URB; }
|
||||
thread_spawner { return THREAD_SPAWNER; }
|
||||
render { return RENDER; }
|
||||
const { return CONST; }
|
||||
data { return DATA; }
|
||||
cre { return CRE; }
|
||||
math { return MATH; }
|
||||
read { return READ; }
|
||||
write { return WRITE; }
|
||||
vme { return VME; }
|
||||
"pixel interp" { return PIXEL_INTERP; }
|
||||
"dp data 1" { return DP_DATA_1; }
|
||||
"rt accel" { return RT_ACCEL; }
|
||||
slm { return SLM; }
|
||||
tgm { return TGM; }
|
||||
ugm { return UGM; }
|
||||
|
||||
";" { return SEMICOLON; }
|
||||
":" { return COLON; }
|
||||
"(" { return LPAREN; }
|
||||
")" { return RPAREN; }
|
||||
"{" { return LCURLY; }
|
||||
"}" { return RCURLY; }
|
||||
"[" { return LSQUARE; }
|
||||
"]" { return RSQUARE; }
|
||||
"<" { return LANGLE; }
|
||||
">" { return RANGLE; }
|
||||
"," { return COMMA; }
|
||||
"." { return DOT; }
|
||||
"+" { return PLUS; }
|
||||
"-" { return MINUS; }
|
||||
"~" { return MINUS; }
|
||||
"(abs)" { return ABS; }
|
||||
|
||||
|
||||
"VxH" { return VxH; }
|
||||
<REG>"<" { return LANGLE; }
|
||||
<REG>[0-9][0-9]* {
|
||||
yylval.integer = strtoul(yytext, NULL, 10);
|
||||
return INTEGER;
|
||||
}
|
||||
<REG>">" { return RANGLE; }
|
||||
<REG>"," { return COMMA; }
|
||||
<REG>"." { BEGIN(DOTSEL); return DOT; }
|
||||
<REG>";" { return SEMICOLON; }
|
||||
|
||||
<DOTSEL>"x" { yylval.integer = BRW_CHANNEL_X; return X; }
|
||||
<DOTSEL>"y" { yylval.integer = BRW_CHANNEL_Y; return Y; }
|
||||
<DOTSEL>"z" { yylval.integer = BRW_CHANNEL_Z; return Z; }
|
||||
<DOTSEL>"w" { yylval.integer = BRW_CHANNEL_W; return W; }
|
||||
<DOTSEL>[0-9][0-9]* {
|
||||
yylval.integer = strtoul(yytext, NULL, 10);
|
||||
BEGIN(REG);
|
||||
return INTEGER;
|
||||
}
|
||||
<DOTSEL>. { yyless(0); BEGIN(INITIAL); }
|
||||
<REG>. { yyless(0); BEGIN(INITIAL); }
|
||||
|
||||
/* Access mode */
|
||||
"align1" { return ALIGN1; }
|
||||
"align16" { return ALIGN16; }
|
||||
|
||||
/* Accumulator write control */
|
||||
AccWrEnable { return ACCWREN; }
|
||||
|
||||
/* Mask control (formerly WECtrl/Write Enable Control) */
|
||||
"WE_all" { return WECTRL; }
|
||||
|
||||
/* Compaction control */
|
||||
compacted { return CMPTCTRL; }
|
||||
|
||||
/* Debug control */
|
||||
breakpoint { return BREAKPOINT; }
|
||||
|
||||
/* Dependency control */
|
||||
NoDDClr { return NODDCLR; }
|
||||
NoDDChk { return NODDCHK; }
|
||||
|
||||
/* End of thread */
|
||||
EOT { return EOT; }
|
||||
|
||||
/* Mask control */
|
||||
nomask { return MASK_DISABLE; }
|
||||
|
||||
/* Channel */
|
||||
<CHANNEL>"x" { yylval.integer = BRW_CHANNEL_X; return X; }
|
||||
<CHANNEL>"y" { yylval.integer = BRW_CHANNEL_Y; return Y; }
|
||||
<CHANNEL>"z" { yylval.integer = BRW_CHANNEL_Z; return Z; }
|
||||
<CHANNEL>"w" { yylval.integer = BRW_CHANNEL_W; return W; }
|
||||
<CHANNEL>[0-9][0-9]* {
|
||||
yylval.integer = strtoul(yytext, NULL, 10);
|
||||
return INTEGER;
|
||||
}
|
||||
<CHANNEL>"." { return DOT; }
|
||||
<CHANNEL>. { yyless(0); BEGIN(INITIAL); }
|
||||
|
||||
|
||||
/* Predicate Control */
|
||||
<CHANNEL>".anyv" { yylval.integer = BRW_PREDICATE_ALIGN1_ANYV; return ANYV; }
|
||||
<CHANNEL>".allv" { yylval.integer = BRW_PREDICATE_ALIGN1_ALLV; return ALLV; }
|
||||
<CHANNEL>".any2h" { yylval.integer = BRW_PREDICATE_ALIGN1_ANY2H; return ANY2H; }
|
||||
<CHANNEL>".all2h" { yylval.integer = BRW_PREDICATE_ALIGN1_ALL2H; return ALL2H; }
|
||||
<CHANNEL>".any4h" { yylval.integer = BRW_PREDICATE_ALIGN16_ANY4H; return ANY4H; }
|
||||
<CHANNEL>".all4h" { yylval.integer = BRW_PREDICATE_ALIGN16_ALL4H; return ALL4H; }
|
||||
<CHANNEL>".any8h" { yylval.integer = BRW_PREDICATE_ALIGN1_ANY8H; return ANY8H; }
|
||||
<CHANNEL>".all8h" { yylval.integer = BRW_PREDICATE_ALIGN1_ALL8H; return ALL8H; }
|
||||
<CHANNEL>".any16h" { yylval.integer = BRW_PREDICATE_ALIGN1_ANY16H; return ANY16H; }
|
||||
<CHANNEL>".all16h" { yylval.integer = BRW_PREDICATE_ALIGN1_ALL16H; return ALL16H; }
|
||||
<CHANNEL>".any32h" { yylval.integer = BRW_PREDICATE_ALIGN1_ANY32H; return ANY32H; }
|
||||
<CHANNEL>".all32h" { yylval.integer = BRW_PREDICATE_ALIGN1_ALL32H; return ALL32H; }
|
||||
|
||||
/* Saturation */
|
||||
".sat" { return SATURATE; }
|
||||
|
||||
/* Thread control */
|
||||
atomic { return ATOMIC; }
|
||||
switch { return SWITCH; }
|
||||
|
||||
/* compression control */
|
||||
compr { return COMPR; }
|
||||
compr4 { return COMPR4; }
|
||||
sechalf { return SECHALF; }
|
||||
|
||||
/* Quarter Control */
|
||||
1[HNQ] { }
|
||||
"2Q" { return QTR_2Q; }
|
||||
"3Q" { return QTR_3Q; }
|
||||
"4Q" { return QTR_4Q; }
|
||||
"2H" { return QTR_2H; }
|
||||
"2N" { return QTR_2N; }
|
||||
"3N" { return QTR_3N; }
|
||||
"4N" { return QTR_4N; }
|
||||
"5N" { return QTR_5N; }
|
||||
"6N" { return QTR_6N; }
|
||||
"7N" { return QTR_7N; }
|
||||
"8N" { return QTR_8N; }
|
||||
|
||||
/* data types */
|
||||
:?B { return TYPE_B; }
|
||||
:?D { return TYPE_D; }
|
||||
:?DF { return TYPE_DF; }
|
||||
:?F { return TYPE_F; }
|
||||
:?HF { return TYPE_HF; }
|
||||
:?NF { return TYPE_NF; }
|
||||
:?Q { return TYPE_Q; }
|
||||
:?UB { return TYPE_UB; }
|
||||
:?UD { return TYPE_UD; }
|
||||
:?UW { return TYPE_UW; }
|
||||
:?UQ { return TYPE_UQ; }
|
||||
:?UV { return TYPE_UV; }
|
||||
:?V { return TYPE_V; }
|
||||
:?VF { return TYPE_VF; }
|
||||
:?W { return TYPE_W; }
|
||||
|
||||
/* Address registers */
|
||||
"a0" { return ADDRREG; }
|
||||
|
||||
/* accumulator registers */
|
||||
"acc"[0-9]+ { yylval.integer = atoi(yytext + 3); return ACCREG; }
|
||||
|
||||
/* channel enable registers */
|
||||
"ce0" { return CHANNELENABLEREG; }
|
||||
|
||||
/* control registers */
|
||||
"cr0" { return CONTROLREG; }
|
||||
|
||||
/* flag registers */
|
||||
"f"[0|1] { BEGIN(CHANNEL); yylval.integer = atoi(yytext + 1); return FLAGREG; }
|
||||
|
||||
/* message control registers */
|
||||
"m" { return MSGREGFILE; }
|
||||
m[0-9]+ { yylval.integer = atoi(yytext + 1); BEGIN(REG); return MSGREG; }
|
||||
|
||||
/* state register */
|
||||
sr[0-9]+ { yylval.integer = atoi(yytext + 2); return STATEREG; }
|
||||
|
||||
/* notification registers */
|
||||
"n0" { BEGIN(REG); return NOTIFYREG; }
|
||||
|
||||
/* IP register */
|
||||
"ip" { return IPREG; }
|
||||
|
||||
/* Thread control register */
|
||||
"tdr0" { return THREADREG; }
|
||||
|
||||
/* performance register */
|
||||
"tm0" { BEGIN(REG); return PERFORMANCEREG; }
|
||||
|
||||
[gr][0-9]+ {
|
||||
yylval.integer = atoi(yytext + 1);
|
||||
BEGIN(REG); return GENREG;
|
||||
}
|
||||
[gr] { return GENREGFILE; }
|
||||
"mask"[0-9]+ { yylval.integer = atoi(yytext + 4); return MASKREG; }
|
||||
|
||||
/* Conditional modifiers */
|
||||
".e" { yylval.integer = BRW_CONDITIONAL_Z; return EQUAL; }
|
||||
".g" { yylval.integer = BRW_CONDITIONAL_G; return GREATER; }
|
||||
".ge" { yylval.integer = BRW_CONDITIONAL_GE; return GREATER_EQUAL; }
|
||||
".l" { yylval.integer = BRW_CONDITIONAL_L; return LESS; }
|
||||
".le" { yylval.integer = BRW_CONDITIONAL_LE; return LESS_EQUAL; }
|
||||
".ne" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_EQUAL; }
|
||||
".nz" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_ZERO; }
|
||||
".o" { yylval.integer = BRW_CONDITIONAL_O; return OVERFLOW; }
|
||||
".r" { yylval.integer = BRW_CONDITIONAL_R; return ROUND_INCREMENT; }
|
||||
".u" { yylval.integer = BRW_CONDITIONAL_U; return UNORDERED; }
|
||||
".z" { yylval.integer = BRW_CONDITIONAL_Z; return ZERO; }
|
||||
|
||||
/* Eat up JIP and UIP token, their values will be parsed
|
||||
* in numeric section
|
||||
*/
|
||||
"JIP: " { BEGIN(LABEL); }
|
||||
"UIP: " { BEGIN(LABEL); }
|
||||
"Jump: " { }
|
||||
"Pop: " { }
|
||||
[ \t]+ { }
|
||||
|
||||
"MsgDesc: " { BEGIN(MSGDESC); return MSGDESC_BEGIN; }
|
||||
<MSGDESC>ex_bso { return EX_BSO; }
|
||||
<MSGDESC>src1_len { return SRC1_LEN; }
|
||||
<MSGDESC>"=" { return ASSIGN; }
|
||||
<MSGDESC>[0-9][0-9]* {
|
||||
yylval.integer = strtoul(yytext, NULL, 10);
|
||||
return INTEGER;
|
||||
}
|
||||
<MSGDESC>"{" { yyless(0); BEGIN(INITIAL); return MSGDESC_END; }
|
||||
<MSGDESC>. { }
|
||||
|
||||
"0x"[0-9a-f][0-9a-f]* {
|
||||
yylval.llint = strtoull(yytext + 2, NULL, 16);
|
||||
return LONG;
|
||||
}
|
||||
[0-9][0-9]* {
|
||||
yylval.llint = strtoll(yytext, NULL, 10);
|
||||
return LONG;
|
||||
}
|
||||
|
||||
/* jump label target */
|
||||
[a-zA-Z_][0-9a-zA-Z_]*":" {
|
||||
yylval.string = ralloc_strdup(p->mem_ctx, yytext);
|
||||
/* Stomp the trailing ':' */
|
||||
yylval.string[yyleng - 1] = '\0';
|
||||
return JUMP_LABEL_TARGET;
|
||||
}
|
||||
|
||||
/* jump label */
|
||||
<LABEL>[a-zA-Z_][0-9a-zA-Z_]* {
|
||||
yylval.string = ralloc_strdup(p->mem_ctx, yytext);
|
||||
BEGIN(INITIAL);
|
||||
return JUMP_LABEL;
|
||||
}
|
||||
|
||||
/* SWSB */
|
||||
"@"[1-7] { yylval.integer = atoi(yytext + 1); return REG_DIST_CURRENT; }
|
||||
"F@"[1-7] { yylval.integer = atoi(yytext + 2); return REG_DIST_FLOAT; }
|
||||
"I@"[1-7] { yylval.integer = atoi(yytext + 2); return REG_DIST_INT; }
|
||||
"L@"[1-7] { yylval.integer = atoi(yytext + 2); return REG_DIST_LONG; }
|
||||
"A@"[1-7] { yylval.integer = atoi(yytext + 2); return REG_DIST_ALL; }
|
||||
|
||||
"$"[0-9]* { yylval.integer = atoi(yytext + 1); return SBID_ALLOC; }
|
||||
"$"[0-9]*".src" { yylval.integer = atoi(yytext + 1); return SBID_WAIT_SRC; }
|
||||
"$"[0-9]*".dst" { yylval.integer = atoi(yytext + 1); return SBID_WAIT_DST; }
|
||||
|
||||
\n { yycolumn = 1; }
|
||||
|
||||
. {
|
||||
fprintf(stderr, "%s: %d: %s: at \"%s\"\n",
|
||||
input_filename, yylineno,
|
||||
"unexpected token", lex_text());
|
||||
}
|
||||
%%
|
||||
|
||||
char *
|
||||
lex_text(void)
|
||||
{
|
||||
return yytext;
|
||||
}
|
||||
|
||||
#ifndef yywrap
|
||||
int yywrap()
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
#endif
|
||||
@@ -51,17 +51,6 @@ aubinator_error_decode = executable(
|
||||
install : true
|
||||
)
|
||||
|
||||
i965_disasm = executable(
|
||||
'i965_disasm',
|
||||
files('i965_disasm.c'),
|
||||
dependencies : [idep_mesautil, dep_thread, idep_intel_dev],
|
||||
include_directories : [inc_include, inc_src, inc_intel],
|
||||
link_with : [libintel_common, libintel_compiler],
|
||||
c_args : [no_override_init_args],
|
||||
gnu_symbol_visibility : 'hidden',
|
||||
install : true
|
||||
)
|
||||
|
||||
error2aub = executable(
|
||||
'intel_error2aub',
|
||||
files('aub_write.h', 'aub_write.c', 'error2aub.c'),
|
||||
@@ -191,72 +180,3 @@ if with_tools.contains('intel-ui')
|
||||
install : true
|
||||
)
|
||||
endif
|
||||
|
||||
bison_command = []
|
||||
if yacc_is_bison
|
||||
bison_command = [
|
||||
prog_bison, '@INPUT@', '--defines=@OUTPUT1@',
|
||||
'--output=@OUTPUT0@'
|
||||
]
|
||||
else
|
||||
bison_command = [
|
||||
prog_bison, '-H', '@OUTPUT1@',
|
||||
'-o', '@OUTPUT0@', '@INPUT@'
|
||||
]
|
||||
endif
|
||||
|
||||
i965_gram_tab = custom_target(
|
||||
'i965_gram.tab.[ch]',
|
||||
input : 'i965_gram.y',
|
||||
output : ['i965_gram.tab.c', 'i965_gram.tab.h'],
|
||||
command : bison_command
|
||||
)
|
||||
|
||||
i965_lex_yy_c = custom_target(
|
||||
'i965_lex.yy.c',
|
||||
input : 'i965_lex.l',
|
||||
output : 'i965_lex.yy.c',
|
||||
command : [prog_flex, '-o', '@OUTPUT@', '@INPUT@']
|
||||
)
|
||||
|
||||
i965_asm = executable(
|
||||
'i965_asm',
|
||||
['i965_asm.c', i965_gram_tab[0], i965_gram_tab[1], i965_lex_yy_c],
|
||||
dependencies : [idep_mesautil, dep_thread, idep_intel_dev],
|
||||
include_directories : [inc_include, inc_src, inc_intel],
|
||||
link_with : [libintel_common, libintel_compiler],
|
||||
c_args : [no_override_init_args],
|
||||
gnu_symbol_visibility : 'hidden',
|
||||
install : true
|
||||
)
|
||||
|
||||
asm_testcases = [
|
||||
['brw', 'gfx4'],
|
||||
['g4x', 'gfx4.5'],
|
||||
['ilk', 'gfx5'],
|
||||
['snb', 'gfx6'],
|
||||
['ivb', 'gfx7'],
|
||||
['hsw', 'gfx7.5'],
|
||||
['bdw', 'gfx8'],
|
||||
['skl', 'gfx9'],
|
||||
['icl', 'gfx11'],
|
||||
['tgl', 'gfx12'],
|
||||
['dg2', 'gfx12.5'],
|
||||
]
|
||||
|
||||
test_runner = find_program('tests/run-test.py')
|
||||
foreach testcase : asm_testcases
|
||||
_gen_name = testcase[0]
|
||||
_gen_num = testcase[1]
|
||||
_gen_folder = join_paths(meson.current_source_dir(), 'tests',
|
||||
_gen_num.replace('gfx', 'gen'))
|
||||
test(
|
||||
'i965_asm_' + _gen_num, test_runner,
|
||||
args : [
|
||||
'--i965_asm', i965_asm,
|
||||
'--gen_name', _gen_name,
|
||||
'--gen_folder', _gen_folder,
|
||||
],
|
||||
suite : 'intel',
|
||||
)
|
||||
endforeach
|
||||
|
||||
@@ -1,7 +0,0 @@
|
||||
and(1) cr0<1>UD cr0<0,1,0>UD 0xfffffb7fUD { align1 1N switch };
|
||||
and(1) cr0<1>UD cr0<0,1,0>UD 0xffffff7fUD { align1 1N switch };
|
||||
and(1) cr0<1>UD cr0<0,1,0>UD 0xffffffcfUD { align1 1N switch };
|
||||
and(1) cr0<1>UD cr0<0,1,0>UD 0xfffffbffUD { align1 1N switch };
|
||||
or(1) cr0<1>UD cr0<0,1,0>UD 0x00000400UD { align1 1N switch };
|
||||
or(1) cr0<1>UD cr0<0,1,0>UD 0x00000030UD { align1 1N switch };
|
||||
or(1) cr0<1>UD cr0<0,1,0>UD 0x00000080UD { align1 1N switch };
|
||||
@@ -1,7 +0,0 @@
|
||||
05 80 00 00 00 00 00 30 00 10 00 06 7f fb ff ff
|
||||
05 80 00 00 00 00 00 30 00 10 00 06 7f ff ff ff
|
||||
05 80 00 00 00 00 00 30 00 10 00 06 cf ff ff ff
|
||||
05 80 00 00 00 00 00 30 00 10 00 06 ff fb ff ff
|
||||
06 80 00 00 00 00 00 30 00 10 00 06 00 04 00 00
|
||||
06 80 00 00 00 00 00 30 00 10 00 06 30 00 00 00
|
||||
06 80 00 00 00 00 00 30 00 10 00 06 80 00 00 00
|
||||
@@ -1 +0,0 @@
|
||||
rol(16) g3<1>UD g2<0,1,0>UD g2.1<0,1,0>UD { align1 1H };
|
||||
@@ -1 +0,0 @@
|
||||
0f 00 80 00 08 02 60 20 40 00 00 02 44 00 00 00
|
||||
@@ -1 +0,0 @@
|
||||
ror(16) g3<1>UD g2<0,1,0>UD g2.1<0,1,0>UD { align1 1H };
|
||||
@@ -1 +0,0 @@
|
||||
0e 00 80 00 08 02 60 20 40 00 00 02 44 00 00 00
|
||||
@@ -1,7 +0,0 @@
|
||||
add3(8) g118<1>D -g117<8,8,1>D g114<8,8,1>D g115<1,1,1>D { align1 1Q I@2 };
|
||||
add3(16) g55<1>D g50<8,8,1>D g46<8,8,1>D -g53<1,1,1>D { align1 1H @2 $5.dst };
|
||||
add3(16) g111<1>D -g40<8,8,1>D -g88<8,8,1>D g111<1,1,1>D { align1 1H I@1 };
|
||||
add3(16) g49<1>D 0x0008UW g47<8,8,1>D g26<1,1,1>D { align1 1H I@4 };
|
||||
add3(16) g55<1>D 0x0008UW g53<8,8,1>D g65<1,1,1>D { align1 2H I@3 };
|
||||
add3(8) g57<1>D g52<8,8,1>D (abs)g48<8,8,1>D (abs)g59<1,1,1>D { align1 1Q I@4 };
|
||||
add3(16) g51<1>D g63<8,8,1>D -g122<8,8,1>D (abs)g27<1,1,1>D { align1 1H I@7 };
|
||||
@@ -1,7 +0,0 @@
|
||||
52 1a 03 00 68 2e 04 76 05 75 0e 0e 05 72 05 73
|
||||
52 a5 04 00 68 0e 04 37 05 32 2e 0e 05 2e 05 35
|
||||
52 19 04 00 68 2e 04 6f 05 28 8e 0e 05 58 05 6f
|
||||
52 1c 04 00 60 41 04 31 08 00 0e 0e 05 2f 05 1a
|
||||
52 1b 24 00 60 41 04 37 08 00 0e 0e 05 35 05 41
|
||||
52 1c 03 00 68 0e 04 39 05 34 5e 0e 05 30 05 3b
|
||||
52 1f 04 00 68 0e 04 33 05 3f 9e 0e 05 7a 05 1b
|
||||
@@ -1,30 +0,0 @@
|
||||
(+f0.0.any8h) send(1) g57UD g58UD nullUD 0x6210c500 0x02000000
|
||||
ugm MsgDesc: ( load, a32, d32, V8, transpose, L1STATE_L3MOCS dst_len = 1, src0_len = 1, src1_len = 0 bti ) BTI 2 base_offset 0 { align1 WE_all 1N $5 };
|
||||
(+f0.0.any8h) send(1) g28UD g29UD nullUD 0x6210c500 0x02000000
|
||||
ugm MsgDesc: ( load, a32, d32, V8, transpose, L1STATE_L3MOCS dst_len = 1, src0_len = 1, src1_len = 0 bti ) BTI 2 base_offset 0 { align1 WE_all 1N $2 };
|
||||
(+f0.0.any32h) send(1) g57UD g58UD nullUD 0x6210c500 0x02000000
|
||||
ugm MsgDesc: ( load, a32, d32, V8, transpose, L1STATE_L3MOCS dst_len = 1, src0_len = 1, src1_len = 0 bti ) BTI 2 base_offset 0 { align1 WE_all 1N $0 };
|
||||
send(8) nullUD g79UD g10UD 0x6200f506 0x04000100
|
||||
ugm MsgDesc: ( store_cmask, a32, d32, xyzw, L1STATE_L3MOCS dst_len = 0, src0_len = 1, src1_len = 4 bti ) BTI 4 base_offset 0 { align1 1Q $0 };
|
||||
send(16) nullUD g9UD g7UD 0x44000504 a0.1<0>UD
|
||||
ugm MsgDesc: ( store, a32, d32, V1, L1STATE_L3MOCS dst_len = 0, src0_len = 2, src1_len = 0 ss ) surface_state_index 0 { align1 1H @1 $0 };
|
||||
send(1) g4UD g0UD nullUD 0x0210151f 0x00000000
|
||||
tgm MsgDesc: ( fence, a32, tile, evict, normal_routing dst_len = 1, src0_len = 1, src1_len = 0 flat ) base_offset 0 { align1 WE_all 1N $3 };
|
||||
send(8) nullUD g36UD g37UD 0x02000b04 0x00000040
|
||||
slm MsgDesc: ( store, a32, d16u32, V1, L1STATE_L3MOCS dst_len = 0, src0_len = 1, src1_len = 1 flat ) base_offset 0 { align1 1Q $1 };
|
||||
send(8) nullUD g34UD g35UD 0x02000b04 0x00000040
|
||||
slm MsgDesc: ( store, a32, d16u32, V1, L1STATE_L3MOCS dst_len = 0, src0_len = 1, src1_len = 1 flat ) base_offset 0 { align1 1Q $0 };
|
||||
send(8) nullUD g6UD g7UD 0x0200f506 0x00000100
|
||||
slm MsgDesc: ( store_cmask, a32, d32, xyzw, L1STATE_L3MOCS dst_len = 0, src0_len = 1, src1_len = 4 flat ) base_offset 0 { align1 1Q $6 };
|
||||
send(16) nullUD g82UD g91UD 0x04040519 0x00000080
|
||||
slm MsgDesc: ( atomic_or, a32, d32, V1, L1UC_L3WB dst_len = 0, src0_len = 2, src1_len = 2 flat ) base_offset 0 { align1 2H $0 };
|
||||
send(1) g10UD g0UD nullUD 0x0210011f 0x00000000
|
||||
slm MsgDesc: ( fence, a32, threadgroup, none, normal_routing dst_len = 1, src0_len = 1, src1_len = 0 flat ) base_offset 0 { align1 WE_all 1N $1 };
|
||||
send(1) g23UD g117UD nullUD 0x2210c500 a0.1<0>UD
|
||||
ugm MsgDesc: ( load, a32, d32, V8, transpose, L1STATE_L3MOCS dst_len = 1, src0_len = 1, bss ) src1_len = 0 ex_bso surface_state_index 0 { align1 WE_all 1N @1 $10 };
|
||||
send(8) nullUD g14UD g24UD 0x040350fc a0.1<0>UD
|
||||
dp data 1 MsgDesc: (DC typed surface write, Surface = 252, SIMD16, Mask = 0x0) src1_len = 4 ex_bso mlen 2 rlen 0 { align1 1Q @1 $5 };
|
||||
send(8) nullUD g51UD g52UD 0x02000000 0x00000040
|
||||
rt accel MsgDesc: SIMD8, mlen 1 ex_mlen 1 rlen 0 { align1 1Q $2 };
|
||||
send(16) nullUD g88UD g98UD 0x02000100 0x00000080
|
||||
rt accel MsgDesc: SIMD16, mlen 1 ex_mlen 2 rlen 0 { align1 1H $6 };
|
||||
@@ -1,15 +0,0 @@
|
||||
31 45 00 88 00 00 0c 39 8e 3a 00 fa 00 00 30 04
|
||||
31 42 00 88 00 00 0c 1c 8e 1d 00 fa 00 00 30 04
|
||||
31 40 00 8c 00 00 0c 39 8e 3a 00 fa 00 00 30 04
|
||||
31 40 03 00 00 00 00 00 8c 4f 0c fa 25 0a 3c 04
|
||||
31 90 04 00 00 01 02 00 14 09 08 fa 04 07 00 04
|
||||
31 43 00 80 00 00 0c 04 0c 00 3e da 00 00 04 00
|
||||
31 41 03 00 00 00 00 00 0c 24 08 e6 0c 25 02 00
|
||||
31 40 03 00 00 00 00 00 0c 22 08 e6 0c 23 02 00
|
||||
31 46 03 00 00 00 00 00 0c 06 0c ea 24 07 3c 00
|
||||
31 40 24 00 00 00 00 00 14 52 32 ea 14 5b 00 01
|
||||
31 41 00 80 00 00 0c 0a 0c 00 3e e2 00 00 00 00
|
||||
31 9a 00 80 80 01 0e 17 8c 75 00 fa 00 00 30 00
|
||||
31 95 03 00 80 01 02 00 14 0e f8 c1 24 18 d4 00
|
||||
31 42 03 00 00 00 00 00 0c 33 00 80 0c 34 00 00
|
||||
31 46 04 00 00 00 00 00 0c 58 00 82 14 62 00 00
|
||||
@@ -1,23 +0,0 @@
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@1 };
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@2 };
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@3 };
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@4 };
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@5 };
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@6 };
|
||||
mul(8) g37<1>D g99<8,8,1>D g36<16,8,2>UW { align1 1Q I@7 };
|
||||
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@1 };
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@2 };
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@3 };
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@4 };
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@5 };
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@6 };
|
||||
mov(8) g36<1>UD g35<8,8,1>F { align1 1Q F@7 };
|
||||
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@1 };
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@2 };
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@3 };
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@4 };
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@5 };
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@6 };
|
||||
add(1) a0<1>UD a0<0,1,0>UD 0x00000800UD { align1 WE_all 1N A@7 };
|
||||
@@ -1,21 +0,0 @@
|
||||
41 19 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
41 1a 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
41 1b 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
41 1c 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
41 1d 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
41 1e 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
41 1f 03 00 60 06 05 25 05 63 46 01 06 24 56 00
|
||||
61 11 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
61 12 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
61 13 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
61 14 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
61 15 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
61 16 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
61 17 03 00 20 0a 05 24 05 23 46 00 00 00 00 00
|
||||
40 09 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
40 0a 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
40 0b 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
40 0c 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
40 0d 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
40 0e 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
40 0f 00 80 20 82 01 10 00 10 00 02 00 08 00 00
|
||||
@@ -1,33 +0,0 @@
|
||||
dp4a(8) g10<1>D g2<8,8,1>D g6<8,8,1>D g7<1,1,1>D { align1 1Q @1 };
|
||||
dp4a(8) g10<1>D g2<8,8,1>D g6<8,8,1>D g7<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g10<1>D g2<8,8,1>D g8<8,8,1>D g9<1,1,1>D { align1 1Q @1 };
|
||||
dp4a(8) g10<1>D g2<8,8,1>D g8<8,8,1>D g9<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g10<1>UD g2<8,8,1>UD g6<8,8,1>UD g7<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g10<1>UD g2<8,8,1>UD g8<8,8,1>UD g9<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g5<1>D g2<8,8,1>D g3<8,8,1>D g4<1,1,1>D { align1 1Q @3 $0.dst };
|
||||
dp4a(8) g5<1>D g2<8,8,1>D g3<8,8,1>D g4<1,1,1>UD { align1 1Q @3 $0.dst };
|
||||
dp4a(8) g5<1>UD g2<8,8,1>UD g3<8,8,1>UD g4<1,1,1>UD { align1 1Q @3 $0.dst };
|
||||
dp4a(8) g6<1>D g2<8,8,1>D g3<8,8,1>D g4<1,1,1>D { align1 1Q @4 $1.dst };
|
||||
dp4a(8) g6<1>D g2<8,8,1>D g3<8,8,1>D g4<1,1,1>UD { align1 1Q @4 $1.dst };
|
||||
dp4a(8) g6<1>D g2<8,8,1>D g4<8,8,1>D g5<1,1,1>D { align1 1Q @4 $0.dst };
|
||||
dp4a(8) g6<1>D g2<8,8,1>D g4<8,8,1>D g5<1,1,1>UD { align1 1Q @4 $0.dst };
|
||||
dp4a(8) g6<1>UD g2<8,8,1>UD g3<8,8,1>UD g4<1,1,1>UD { align1 1Q @4 $1.dst };
|
||||
dp4a(8) g6<1>UD g2<8,8,1>UD g4<8,8,1>UD g5<1,1,1>UD { align1 1Q @4 $0.dst };
|
||||
dp4a(8) g7<1>D g2<8,8,1>D g5<8,8,1>D g6<1,1,1>D { align1 1Q @1 };
|
||||
dp4a(8) g7<1>D g2<8,8,1>D g5<8,8,1>D g6<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g7<1>UD g2<8,8,1>UD g5<8,8,1>UD g6<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g8<1>D g2<8,8,1>D g4<8,8,1>D g5<1,1,1>D { align1 1Q @3 $0.dst };
|
||||
dp4a(8) g8<1>D g2<8,8,1>D g4<8,8,1>D g5<1,1,1>D { align1 1Q @4 $0.dst };
|
||||
dp4a(8) g8<1>D g2<8,8,1>D g4<8,8,1>D g5<1,1,1>UD { align1 1Q @3 $0.dst };
|
||||
dp4a(8) g8<1>D g2<8,8,1>D g4<8,8,1>D g5<1,1,1>UD { align1 1Q @4 $0.dst };
|
||||
dp4a(8) g8<1>D g2<8,8,1>D g6<8,8,1>D g7<1,1,1>D { align1 1Q @1 };
|
||||
dp4a(8) g8<1>D g2<8,8,1>D g6<8,8,1>D g7<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a(8) g8<1>UD g2<8,8,1>UD g4<8,8,1>UD g5<1,1,1>UD { align1 1Q @3 $0.dst };
|
||||
dp4a(8) g8<1>UD g2<8,8,1>UD g4<8,8,1>UD g5<1,1,1>UD { align1 1Q @4 $0.dst };
|
||||
dp4a(8) g8<1>UD g2<8,8,1>UD g6<8,8,1>UD g7<1,1,1>UD { align1 1Q @1 };
|
||||
dp4a.sat(8) g10<1>D g5<8,8,1>D g6<8,8,1>D g7<1,1,1>D { align1 1Q @1 $2.dst };
|
||||
dp4a.sat(8) g10<1>D g5<8,8,1>D g6<8,8,1>D g7<1,1,1>UD { align1 1Q @1 $2.dst };
|
||||
dp4a.sat(8) g10<1>UD g5<8,8,1>UD g6<8,8,1>UD g7<1,1,1>UD { align1 1Q @1 $2.dst };
|
||||
dp4a.sat(8) g8<1>D g5<8,8,1>D g3<8,8,1>D g4<1,1,1>D { align1 1Q $2.dst };
|
||||
dp4a.sat(8) g8<1>D g5<8,8,1>D g3<8,8,1>D g4<1,1,1>UD { align1 1Q $2.dst };
|
||||
dp4a.sat(8) g8<1>UD g5<8,8,1>UD g3<8,8,1>UD g4<1,1,1>UD { align1 1Q $2.dst };
|
||||
@@ -1,33 +0,0 @@
|
||||
58 01 03 00 68 0e 04 0a 05 02 0e 0e 05 06 05 07
|
||||
58 01 03 00 68 0e 04 0a 05 02 0a 0e 05 06 05 07
|
||||
58 01 03 00 68 0e 04 0a 05 02 0e 0e 05 08 05 09
|
||||
58 01 03 00 68 0e 04 0a 05 02 0a 0e 05 08 05 09
|
||||
58 01 03 00 28 0a 04 0a 05 02 0a 0a 05 06 05 07
|
||||
58 01 03 00 28 0a 04 0a 05 02 0a 0a 05 08 05 09
|
||||
58 b0 03 00 68 0e 04 05 05 02 0e 0e 05 03 05 04
|
||||
58 b0 03 00 68 0e 04 05 05 02 0a 0e 05 03 05 04
|
||||
58 b0 03 00 28 0a 04 05 05 02 0a 0a 05 03 05 04
|
||||
58 c1 03 00 68 0e 04 06 05 02 0e 0e 05 03 05 04
|
||||
58 c1 03 00 68 0e 04 06 05 02 0a 0e 05 03 05 04
|
||||
58 c0 03 00 68 0e 04 06 05 02 0e 0e 05 04 05 05
|
||||
58 c0 03 00 68 0e 04 06 05 02 0a 0e 05 04 05 05
|
||||
58 c1 03 00 28 0a 04 06 05 02 0a 0a 05 03 05 04
|
||||
58 c0 03 00 28 0a 04 06 05 02 0a 0a 05 04 05 05
|
||||
58 01 03 00 68 0e 04 07 05 02 0e 0e 05 05 05 06
|
||||
58 01 03 00 68 0e 04 07 05 02 0a 0e 05 05 05 06
|
||||
58 01 03 00 28 0a 04 07 05 02 0a 0a 05 05 05 06
|
||||
58 b0 03 00 68 0e 04 08 05 02 0e 0e 05 04 05 05
|
||||
58 c0 03 00 68 0e 04 08 05 02 0e 0e 05 04 05 05
|
||||
58 b0 03 00 68 0e 04 08 05 02 0a 0e 05 04 05 05
|
||||
58 c0 03 00 68 0e 04 08 05 02 0a 0e 05 04 05 05
|
||||
58 01 03 00 68 0e 04 08 05 02 0e 0e 05 06 05 07
|
||||
58 01 03 00 68 0e 04 08 05 02 0a 0e 05 06 05 07
|
||||
58 b0 03 00 28 0a 04 08 05 02 0a 0a 05 04 05 05
|
||||
58 c0 03 00 28 0a 04 08 05 02 0a 0a 05 04 05 05
|
||||
58 01 03 00 28 0a 04 08 05 02 0a 0a 05 06 05 07
|
||||
58 92 03 00 6c 0e 04 0a 05 05 0e 0e 05 06 05 07
|
||||
58 92 03 00 6c 0e 04 0a 05 05 0a 0e 05 06 05 07
|
||||
58 92 03 00 2c 0a 04 0a 05 05 0a 0a 05 06 05 07
|
||||
58 22 03 00 6c 0e 04 08 05 05 0e 0e 05 03 05 04
|
||||
58 22 03 00 6c 0e 04 08 05 05 0a 0e 05 03 05 04
|
||||
58 22 03 00 2c 0a 04 08 05 05 0a 0a 05 03 05 04
|
||||
@@ -1,43 +0,0 @@
|
||||
send(16) g113UD g12UD nullUD a0<0>UD 0x00000000
|
||||
dp data 1 MsgDesc: indirect ex_mlen 0 { align1 1H @1 $6 };
|
||||
(+f1.0) send(16) nullUD g15UD g17UD a0<0>UD 0x00000080
|
||||
dp data 1 MsgDesc: indirect ex_mlen 2 { align1 1H @1 $4 };
|
||||
send(8) g104UD g119UD nullUD 0x04116e13 0x00000000
|
||||
dp data 1 MsgDesc: (DC typed surface read, Surface = 19, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 2Q $8 };
|
||||
send(8) nullUD g92UD g117UD 0x020350fc a0.1<0>UD
|
||||
dp data 1 MsgDesc: (DC typed surface write, Surface = 252, SIMD16, Mask = 0x0) mlen 1 rlen 0 { align1 1Q @1 $8 };
|
||||
(+f0.0.any8h) send(8) g55UD g118UD nullUD 0x02184201 0x00000000
|
||||
data MsgDesc: (DC unaligned OWORD block read, bti 1, 2) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1Q @3 $9 };
|
||||
send(8) nullUD g126UD nullUD 0x02000000 0x00000000
|
||||
thread_spawner MsgDesc: mlen 1 ex_mlen 0 rlen 0 { align1 WE_all 1Q @1 EOT };
|
||||
send(8) g18UD g24UD nullUD 0x04115e10 0x00000000
|
||||
dp data 1 MsgDesc: (DC typed surface read, Surface = 16, SIMD16, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 1Q $1 };
|
||||
send(8) g19UD g28UD nullUD 0x04116e10 0x00000000
|
||||
dp data 1 MsgDesc: (DC typed surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 2Q @7 $2 };
|
||||
send(16) g50UD g36UD nullUD a0<0>UD 0x00000000
|
||||
sampler MsgDesc: indirect ex_mlen 0 { align1 1H @1 $3 };
|
||||
send(8) nullUD g25UD g21UD 0x02035001 0x00000100
|
||||
dp data 1 MsgDesc: (DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q $9 };
|
||||
send(8) g5UD g25UD nullUD 0x02415001 0x00000000
|
||||
dp data 1 MsgDesc: (DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 0 rlen 4 { align1 1Q $10 };
|
||||
send(8) g27UD g35UD nullUD 0x04146efd 0x00000000
|
||||
dp data 1 MsgDesc: (DC A64 untyped surface read, Surface = 253, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 1Q @1 $0 };
|
||||
send(8) nullUD g36UD g38UD 0x04035001 0x00000100
|
||||
dp data 1 MsgDesc: (DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q @1 $1 };
|
||||
send(8) nullUD g126UD g118UD 0x02080007 0x00000200
|
||||
urb MsgDesc: offset 0 SIMD8 write mlen 1 ex_mlen 8 rlen 0 { align1 1Q @1 EOT };
|
||||
send(8) g14UD g37UD nullUD 0x02110401 0x00000000
|
||||
data MsgDesc: (DC byte scattered read, bti 1, 4) mlen 1 ex_mlen 0 rlen 1 { align1 1Q @1 $0 };
|
||||
send(1) g100UD g0UD nullUD 0x0219e000 0x00000000
|
||||
data MsgDesc: (DC mfence, bti 0, 32) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1N $1 };
|
||||
send(1) g15UD g0UD nullUD 0x0219e000 0x00000000
|
||||
data MsgDesc: (DC mfence, bti 0, 32) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1N $5 };
|
||||
|
||||
sendc(16) nullUD g119UD nullUD 0x10031000 0x00000000
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 8 ex_mlen 0 rlen 0 { align1 1H @1 EOT };
|
||||
sendc(8) nullUD g125UD g123UD 0x04031400 0x00000080
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 2 ex_mlen 2 rlen 0 { align1 1Q @1 EOT };
|
||||
sendc(16) nullUD g119UD nullUD 0x10031000 0x00000000
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 8 ex_mlen 0 rlen 0 { align1 1H @1 EOT };
|
||||
sendc(16) nullUD g123UD g119UD 0x08031000 0x00000100
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 4 ex_mlen 4 rlen 0 { align1 1H @1 EOT };
|
||||
@@ -1,21 +0,0 @@
|
||||
31 96 04 00 00 00 05 71 04 0c 00 c0 00 00 00 00
|
||||
31 94 84 01 00 00 01 00 04 0f 00 c0 14 11 00 00
|
||||
31 48 13 00 00 00 0c 68 14 77 26 cc 00 00 5a 00
|
||||
31 98 03 00 00 01 02 00 0c 5c f8 c1 04 75 d4 00
|
||||
31 b9 03 88 00 00 0c 37 0c 76 02 a4 00 00 10 02
|
||||
31 01 03 80 04 00 00 00 0c 7e 00 70 00 00 00 00
|
||||
31 41 03 00 00 00 0c 12 14 18 20 cc 00 00 56 00
|
||||
31 f2 13 00 00 00 0c 13 14 1c 20 cc 00 00 5a 00
|
||||
31 93 04 00 00 00 05 32 04 24 00 20 00 00 00 00
|
||||
31 49 03 00 00 00 00 00 0c 19 02 c0 24 15 d4 00
|
||||
31 4a 03 00 00 00 24 05 0c 19 02 c0 00 00 54 00
|
||||
31 90 03 00 00 00 0c 1b 14 23 fa cd 00 00 1a 01
|
||||
31 91 03 00 00 00 00 00 14 24 02 c0 24 26 d4 00
|
||||
31 01 03 00 04 00 00 00 0c 7e 0e 60 44 76 00 02
|
||||
31 90 03 00 00 00 0c 0e 0c 25 02 a8 00 00 40 00
|
||||
31 41 00 80 00 00 0c 64 0c 00 00 a0 00 00 78 02
|
||||
31 45 00 80 00 00 0c 0f 0c 00 00 a0 00 00 78 02
|
||||
32 01 04 00 04 00 00 00 44 77 00 50 00 00 c4 00
|
||||
32 01 03 00 04 00 00 00 14 7d 00 58 14 7b c4 00
|
||||
32 01 04 00 04 00 00 00 44 77 00 50 00 00 c4 00
|
||||
32 01 04 00 04 00 00 00 24 7b 00 50 24 77 c4 00
|
||||
@@ -1,40 +0,0 @@
|
||||
cmp.l.f0.0(8) g55<1>UD g54<8,8,1>UD 0x00000290UD { align1 1Q @1 };
|
||||
mov(16) g6<1>D g20<8,8,1>W { align1 2H @2 };
|
||||
add(16) g122<1>F g98<8,8,1>F (abs)g102<8,8,1>F { align1 1H @3 };
|
||||
shl(8) g75<1>D g122<8,8,1>D 0x00000002UD { align1 1Q @4 };
|
||||
sel.l(4) g90.4<1>D g90.3<0,1,0>D g90.4<4,4,1>D { align1 WE_all 1N @5 };
|
||||
and(16) g58<1>UD g16<8,8,1>UD g56<8,8,1>UD { align1 1H @6 };
|
||||
or.nz.f0.0(16) null<1>UD g105<8,8,1>UD g103<8,8,1>UD { align1 1H @7 };
|
||||
|
||||
math cos(16) g17<1>F g15<8,8,1>F null<8,8,1>F { align1 1H @1 $0 };
|
||||
math exp(16) g1<1>F g29<8,8,1>F null<8,8,1>F { align1 1H @5 $2 };
|
||||
math sqrt(8) g9<1>HF g6<8,8,1>HF null<8,8,1>F { align1 1Q @1 $3 };
|
||||
math intdiv(8) g103<1>D g101<8,8,1>D g35<8,8,1>D { align1 1Q @4 $4 };
|
||||
math intmod(8) g101<1>D g97<8,8,1>D g76<8,8,1>D { align1 2Q @2 $5 };
|
||||
math inv(16) g10<1>F g8<8,8,1>F null<8,8,1>F { align1 2H @2 $6 };
|
||||
math log(16) g102<1>F g100<8,8,1>F null<8,8,1>F { align1 2H @1 $7 };
|
||||
math rsq(16) g76<1>F g74<8,8,1>F null<8,8,1>F { align1 1H @7 $8 };
|
||||
math sin(16) g123<1>F g121<8,8,1>F null<8,8,1>F { align1 1H @4 $9 };
|
||||
math sqrt(16) g43<1>F g47<8,8,1>F null<8,8,1>F { align1 2H @7 $10 };
|
||||
math cos(8) g103<1>HF g98<8,8,1>HF null<8,8,1>F { align1 1Q @3 $11 };
|
||||
math exp(8) g54<1>HF g52<8,8,1>HF null<8,8,1>F { align1 1Q @1 $12 };
|
||||
math intdiv(8) g35<1>D g31<8,8,1>D g33<8,8,1>D { align1 4Q @2 $13 };
|
||||
math intmod(8) g101<1>D g97<8,8,1>D g99<8,8,1>D { align1 2Q @4 $14 };
|
||||
math inv(8) g102<1>HF g92<8,8,1>HF null<8,8,1>F { align1 1Q @6 $15 };
|
||||
|
||||
sel.ge(16) g7<1>UW g7<16,16,1>UW g89<16,8,2>UW { align1 1H @7 $0.dst };
|
||||
mov(16) a0<1>UW 0x03e0UW { align1 WE_all 1H @3 $1.dst };
|
||||
add(16) g100<1>D g102<8,8,1>D -2114D { align1 1H @3 $2.dst };
|
||||
add(16) g100<1>D g105<8,8,1>D (abs)g18<8,8,1>D { align1 1H @3 $3.dst };
|
||||
add(16) g36<1>D g36<8,8,1>D g106<8,8,1>D { align1 1H @7 $4.dst };
|
||||
and(16) g49<1>UD g45<8,8,1>UD g47<8,8,1>UD { align1 1H @3 $5.dst };
|
||||
asr(16) g102<2>W g41<16,8,2>W g28<8,8,1>UD { align1 2H @6 $6.dst };
|
||||
cmp.l.f0.0(8) g97<1>F (abs)g96<8,8,1>F 0x3d4ccccdF /* 0.05F */ { align1 1Q @3 $7.dst };
|
||||
cmp.nz.f0.0(8) g100<1>F g98<8,8,1>F g99<8,8,1>F { align1 1Q @1 $8.dst };
|
||||
(+f0.0) sel(8) g64<1>D -g15<8,8,1>D g15<8,8,1>D { align1 1Q @1 $9.dst };
|
||||
mov(16) g15<1>UD g13<8,8,1>D { align1 1H @1 $10.dst };
|
||||
mul(8) acc0<1>UD g10<8,4,2>UD g101<16,8,2>UW { align1 1Q @7 $11.dst };
|
||||
or(16) g51<1>UW g51<16,16,1>UW g75<16,8,2>UW { align1 1H @7 $12.dst };
|
||||
sel.ge(16) g28<1>W g28<16,16,1>W g92<16,8,2>W { align1 2H @7 $13.dst };
|
||||
xor(16) g10<1>UD g10<8,8,1>UD g100<8,8,1>UD { align1 1H @7 $14.dst };
|
||||
and(16) g39<1>UD g35<8,8,1>UD g37<8,8,1>UD { align1 2H @5 $15.dst };
|
||||
@@ -1,38 +0,0 @@
|
||||
70 01 03 00 20 82 05 37 05 36 46 52 90 02 00 00
|
||||
61 02 24 00 60 05 05 06 05 14 46 00 00 00 00 00
|
||||
40 03 04 00 a0 0a 05 7a 05 62 46 0a 05 66 46 01
|
||||
69 04 03 00 60 86 05 4b 05 7a 46 02 02 00 00 00
|
||||
62 05 02 80 60 06 85 5a 64 5a 00 56 85 5a 34 00
|
||||
65 06 04 00 20 02 05 3a 05 10 46 02 05 38 46 00
|
||||
66 07 04 00 20 02 01 00 05 69 46 22 05 67 46 00
|
||||
38 90 04 00 a0 0a 05 11 05 0f 46 7a 01 00 46 00
|
||||
38 d2 04 00 a0 0a 05 01 05 1d 46 3a 01 00 46 00
|
||||
38 93 03 00 90 09 05 09 05 06 46 4a 01 00 46 00
|
||||
38 c4 03 00 60 06 05 67 05 65 46 c6 05 23 46 00
|
||||
38 a5 13 00 60 06 05 65 05 61 46 d6 05 4c 46 00
|
||||
38 a6 24 00 a0 0a 05 0a 05 08 46 1a 01 00 46 00
|
||||
38 97 24 00 a0 0a 05 66 05 64 46 2a 01 00 46 00
|
||||
38 f8 04 00 a0 0a 05 4c 05 4a 46 5a 01 00 46 00
|
||||
38 c9 04 00 a0 0a 05 7b 05 79 46 6a 01 00 46 00
|
||||
38 fa 24 00 a0 0a 05 2b 05 2f 46 4a 01 00 46 00
|
||||
38 bb 03 00 90 09 05 67 05 62 46 7a 01 00 46 00
|
||||
38 9c 03 00 90 09 05 36 05 34 46 3a 01 00 46 00
|
||||
38 ad 33 00 60 06 05 23 05 1f 46 c6 05 21 46 00
|
||||
38 ce 13 00 60 06 05 65 05 61 46 d6 05 63 46 00
|
||||
38 ef 03 00 90 09 05 66 05 5c 46 1a 01 00 46 00
|
||||
62 f0 04 00 10 01 05 07 05 07 58 41 06 59 56 00
|
||||
61 b1 04 80 10 41 01 10 00 00 00 00 e0 03 e0 03
|
||||
40 b2 04 00 60 86 05 64 05 66 46 06 be f7 ff ff
|
||||
40 b3 04 00 60 06 05 64 05 69 46 06 05 12 46 01
|
||||
40 f4 04 00 60 06 05 24 05 24 46 06 05 6a 46 00
|
||||
65 b5 04 00 20 02 05 31 05 2d 46 02 05 2f 46 00
|
||||
6c e6 24 00 50 05 06 66 06 29 56 02 05 1c 46 00
|
||||
70 b7 03 00 a0 9a 05 61 05 60 46 5a cd cc 4c 3d
|
||||
70 98 03 00 a0 0a 05 64 05 62 46 2a 05 63 46 00
|
||||
62 99 03 01 60 26 05 40 05 0f 46 06 05 0f 46 00
|
||||
61 9a 04 00 20 06 05 0f 05 0d 46 00 00 00 00 00
|
||||
41 fb 03 00 20 02 01 20 06 0a 44 01 06 65 56 00
|
||||
66 fc 04 00 10 01 05 33 05 33 58 01 06 4b 56 00
|
||||
62 fd 24 00 50 05 05 1c 05 1c 58 45 06 5c 56 00
|
||||
67 fe 04 00 20 02 05 0a 05 0a 46 02 05 64 46 00
|
||||
65 df 24 00 20 02 05 27 05 23 46 02 05 25 46 00
|
||||
@@ -1,33 +0,0 @@
|
||||
sync nop(16) null<0,1,0>UB { align1 WE_all 1H @1 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @1 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @2 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @3 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @4 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @5 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @6 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 1N @7 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @1 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @2 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @3 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @4 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @5 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @6 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 3N @7 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @1 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @2 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @3 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @4 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @5 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @6 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 5N @7 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @1 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @2 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @3 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @4 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @5 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @6 };
|
||||
sync nop(1) null<0,1,0>UB { align1 WE_all 7N @7 };
|
||||
sync nop(32) null<0,1,0>UB { align1 WE_all @1 };
|
||||
sync nop(8) null<0,1,0>UB { align1 WE_all 1Q @1 };
|
||||
sync allwr(16) null<0,1,0>UB { align1 1H };
|
||||
sync allwr(8) null<0,1,0>UB { align1 1Q };
|
||||
@@ -1,33 +0,0 @@
|
||||
01 01 04 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 01 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 02 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 03 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 04 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 06 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 07 00 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 01 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 02 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 03 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 04 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 05 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 06 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 07 10 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 01 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 02 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 03 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 04 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 05 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 06 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 07 20 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 01 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 02 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 03 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 04 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 05 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 06 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 07 30 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 01 05 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 01 03 80 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
01 00 04 00 00 00 00 00 00 00 00 30 00 00 00 00
|
||||
01 00 03 00 00 00 00 00 00 00 00 30 00 00 00 00
|
||||
@@ -1,49 +0,0 @@
|
||||
add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
|
||||
add(8) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 };
|
||||
add(8) g8<1>F g10.8<8,8,1>UW -g1<0,1,0>F { align1 sechalf };
|
||||
add(16) g4<1>F g18<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
add(1) m14.4<1>D g8.4<0,1,0>D 16D { align1 nomask };
|
||||
add(8) g5<1>.xD g2<4>.xD 64D { align16 };
|
||||
add(8) g4<1>.xD g5<4>.xD g4<4>.xD { align16 };
|
||||
add(8) g3<1>F g3<4>F g5<4>F { align16 };
|
||||
add(16) g24<1>F g20<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
add(16) g14<1>D g14<8,8,1>D 1D { align1 compr };
|
||||
add(8) m5<1>.xyzF g10<4>.xyzzF g8<4>.xyzzF { align16 NoDDClr };
|
||||
add.le.f0.0(16) g6<1>F g8<8,8,1>F g4<8,8,1>F { align1 compr };
|
||||
add(16) m3<1>F g4<8,8,1>F g12<8,8,1>F { align1 compr4 };
|
||||
add(8) a0<1>UW g4<16,8,2>UW 0x0040UW { align1 };
|
||||
add(8) a0<1>UW g5<16,8,2>UW 0x0040UW { align1 sechalf };
|
||||
add(8) g3<1>.xyF g2<4>.xyyyF 0x3f800000F /* 1F */ { align16 };
|
||||
add(16) m4<1>F -g6<8,8,1>F 0x3f800000F /* 1F */ { align1 compr4 };
|
||||
add(16) m2<1>D g6<8,8,1>D g8.3<0,1,0>D { align1 compr };
|
||||
add(16) m14<1>D g4<8,8,1>D 12D { align1 compr };
|
||||
add.sat(16) g6<1>F g4<8,8,1>F g2.1<0,1,0>F { align1 compr };
|
||||
add(8) g37<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
|
||||
add(8) g38<1>D g2<0,1,0>D 1D { align1 };
|
||||
add(8) m5<1>.xF g3<4>.xF 0x3f000000F /* 0.5F */ { align16 };
|
||||
add(16) g4<1>D g2<0,1,0>D -g2.2<0,1,0>D { align1 compr };
|
||||
add.sat(8) m5<1>F g7<4>F g8<4>F { align16 };
|
||||
add(8) g31<1>.xyzF g28<4>.xyzzF 0x30300000VF /* [0F, 0F, 1F, 1F]VF */ { align16 };
|
||||
add.sat(8) m5<1>.xyzF g25<4>.xyzzF g26<4>.xyzzF { align16 NoDDClr };
|
||||
add.ge.f0.0(8) g8<1>.xF -g8<4>.xF 0x3f800000F /* 1F */ { align16 };
|
||||
add(16) g4.1<2>UW g4.1<16,8,2>UW g6<16,8,2>UW { align1 compr };
|
||||
add.ge.f0.0(16) g4<1>F -g6<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
add(8) g4<1>.xyF g4<4>.xyyyF 0xbf800000F /* -1F */ { align16 NoDDClr };
|
||||
add(8) m5<1>.xyzF g4<4>.xyzzF g2<0>.xyzzF { align16 };
|
||||
add.sat(16) m6<1>F g2<0,1,0>F g2.4<0,1,0>F { align1 compr4 };
|
||||
add(8) m5<1>.zwF g8<4>.xxxyF g9<4>.xxxyF { align16 NoDDChk };
|
||||
add(8) g4<1>.xUD g4<4>.xUD 0x00000040UD { align16 };
|
||||
add.sat(8) m5<1>.yF g1<0>.zF 0x3f000000F /* 0.5F */ { align16 };
|
||||
add(16) m14<1>UD g4<8,8,1>UD 0x00000110UD { align1 compr };
|
||||
add(8) g5<1>F -g9<4>.xyxyF g9<4>.zwzwF { align16 sechalf };
|
||||
add.sat(8) m5<1>.yF g6<4>.xF g7<4>.xF { align16 NoDDClr,NoDDChk };
|
||||
add.sat(8) m5<1>.wF g6<4>.xF g7<4>.xF { align16 NoDDChk };
|
||||
add.ge.f0.0(16) g16<1>F g18<8,8,1>F g10<8,8,1>F { align1 compr };
|
||||
add.sat(8) m5<1>.yF -g1<0>.xF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
|
||||
add.sat(8) m5<1>.zF g3<4>.yF 0x40000000F /* 2F */ { align16 NoDDClr,NoDDChk };
|
||||
add.sat(8) m5<1>.wF g3<4>.yF 0xc0000000F /* -2F */ { align16 NoDDChk };
|
||||
add(8) m5<1>F g3<4>F 0x2020a038VF /* [1.5F, -0.5F, 0.5F, 0.5F]VF */ { align16 };
|
||||
add(8) g5<1>.zF g4<4>.xF 0xbf800000F /* -1F */ { align16 NoDDClr,NoDDChk };
|
||||
add(8) m5<1>.xyF g12<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
|
||||
add(8) m5<1>.wF -g3<4>.xF 0x3f800000F /* 1F */ { align16 NoDDClr,NoDDChk };
|
||||
add(8) g5<1>.xyF g3<0>.xyyyF g4<4>.xyyyF { align16 NoDDClr };
|
||||
@@ -1,49 +0,0 @@
|
||||
40 00 80 00 29 6d 40 21 28 00 48 00 10 10 10 10
|
||||
40 00 60 00 3d 75 c0 20 40 01 8d 00 20 40 00 00
|
||||
40 10 60 00 3d 75 00 21 50 01 8d 00 20 40 00 00
|
||||
40 20 80 00 bd 77 80 20 40 02 8d 00 c0 00 8d 00
|
||||
40 02 00 00 a6 1c d0 21 10 01 00 00 10 00 00 00
|
||||
40 01 60 00 a5 1c a1 20 40 00 60 00 40 00 00 00
|
||||
40 01 60 00 a5 14 81 20 a0 00 60 00 80 00 60 00
|
||||
40 01 60 00 bd 77 6f 20 64 00 6e 00 a4 00 6e 00
|
||||
40 20 80 00 bd 7f 00 23 80 02 8d 00 00 00 80 3f
|
||||
40 20 80 00 a5 1c c0 21 c0 01 8d 00 01 00 00 00
|
||||
40 05 60 00 be 77 a7 20 44 01 6a 00 04 01 6a 00
|
||||
40 20 80 06 bd 77 c0 20 00 01 8d 00 80 00 8d 00
|
||||
40 20 80 00 be 77 60 30 80 00 8d 00 80 01 8d 00
|
||||
40 00 60 00 28 2d 00 22 80 00 ae 00 40 00 40 00
|
||||
40 10 60 00 28 2d 00 22 a0 00 ae 00 40 00 40 00
|
||||
40 01 60 00 bd 7f 63 20 44 00 65 00 00 00 80 3f
|
||||
40 20 80 00 be 7f 80 30 c0 40 8d 00 00 00 80 3f
|
||||
40 20 80 00 a6 14 40 20 c0 00 8d 00 0c 01 00 00
|
||||
40 20 80 00 a6 1c c0 21 80 00 8d 00 0c 00 00 00
|
||||
40 20 80 80 bd 77 c0 20 80 00 8d 00 44 00 00 00
|
||||
40 00 60 00 29 6d a0 24 28 00 48 00 10 10 10 10
|
||||
40 00 60 00 a5 1c c0 24 40 00 00 00 01 00 00 00
|
||||
40 01 60 00 be 7f a1 20 60 00 60 00 00 00 00 3f
|
||||
40 20 80 00 a5 14 80 20 40 00 00 00 48 40 00 00
|
||||
40 01 60 80 be 77 af 20 e4 00 6e 00 04 01 6e 00
|
||||
40 01 60 00 bd 5f e7 23 84 03 6a 00 00 00 30 30
|
||||
40 05 60 80 be 77 a7 20 24 03 6a 00 44 03 6a 00
|
||||
40 01 60 04 bd 7f 01 21 00 41 60 00 00 00 80 3f
|
||||
40 20 80 00 29 25 82 40 82 00 ae 00 c0 00 ae 00
|
||||
40 20 80 04 bd 7f 80 20 c0 40 8d 00 00 00 80 3f
|
||||
40 05 60 00 bd 7f 83 20 84 00 65 00 00 00 80 bf
|
||||
40 01 60 00 be 77 a7 20 84 00 6a 00 44 00 0a 00
|
||||
40 20 80 80 be 77 c0 30 40 00 00 00 50 00 00 00
|
||||
40 09 60 00 be 77 ac 20 00 01 64 00 20 01 64 00
|
||||
40 01 60 00 21 0c 81 20 80 00 60 00 40 00 00 00
|
||||
40 01 60 80 be 7f a2 20 2a 00 0a 00 00 00 00 3f
|
||||
40 20 80 00 22 0c c0 21 80 00 8d 00 10 01 00 00
|
||||
40 11 60 00 bd 77 af 20 24 41 64 00 2e 01 6e 00
|
||||
40 0d 60 80 be 77 a2 20 c0 00 60 00 e0 00 60 00
|
||||
40 09 60 80 be 77 a8 20 c0 00 60 00 e0 00 60 00
|
||||
40 20 80 04 bd 77 00 22 40 02 8d 00 40 01 8d 00
|
||||
40 05 60 80 be 7f a2 20 20 40 00 00 00 00 00 3f
|
||||
40 0d 60 80 be 7f a4 20 65 00 65 00 00 00 00 40
|
||||
40 09 60 80 be 7f a8 20 65 00 65 00 00 00 00 c0
|
||||
40 01 60 00 be 5f af 20 64 00 6e 00 38 a0 20 20
|
||||
40 0d 60 00 bd 7f a4 20 80 00 60 00 00 00 80 bf
|
||||
40 05 60 00 be 7f a3 20 84 01 65 00 00 00 00 3f
|
||||
40 0d 60 00 be 7f a8 20 60 40 60 00 00 00 80 3f
|
||||
40 05 60 00 bd 77 a3 20 64 00 05 00 84 00 65 00
|
||||
@@ -1,17 +0,0 @@
|
||||
and(8) g9<1>.wUD g9<4>.wUD 524032D { align16 };
|
||||
and(16) g4<1>D g6<8,8,1>D 1D { align1 compr };
|
||||
and(8) g10<1>.xD g10<4>.xD 1D { align16 };
|
||||
and(16) g6<1>UD g10<8,8,1>UD g8<8,8,1>UD { align1 compr };
|
||||
and.nz.f0.0(16) null<1>D g6<8,8,1>UD 1D { align1 compr };
|
||||
and(16) g4<1>D g8<8,8,1>UD 1D { align1 compr };
|
||||
and(8) g2<1>D g2<8,8,1>UD 1D { align1 };
|
||||
and.nz.f0.0(8) null<1>.xD g9<4>.xUD 1D { align16 };
|
||||
and(16) g12<1>UD g2.4<0,1,0>UD 0x80000000UD { align1 compr };
|
||||
and.nz.f0.0(16) g110<1>D g6<8,8,1>D 1D { align1 compr };
|
||||
and(1) g10<1>UD f0<0,1,0>UW 0x0000000fUD { align1 nomask };
|
||||
and(8) g17<1>.xUD g1<0>.xUD 0x80000000UD { align16 };
|
||||
and.nz.f0.0(16) g6<1>D g4<8,8,1>UD 1D { align1 compr };
|
||||
and(8) g5<1>.xUD g1<0>.xUD g1<0>.yUD { align16 };
|
||||
and(8) g8<1>.xD g7<4>.xUD 1D { align16 };
|
||||
and.nz.f0.0(8) g6<1>.xD g6<4>.xD 1D { align16 };
|
||||
and.nz.f0.0(1) null<1>UD g1.6<0,1,0>UD 0x04000000UD { align1 };
|
||||
@@ -1,17 +0,0 @@
|
||||
05 01 60 00 21 1c 28 21 2f 01 6f 00 00 ff 07 00
|
||||
05 20 80 00 a5 1c 80 20 c0 00 8d 00 01 00 00 00
|
||||
05 01 60 00 a5 1c 41 21 40 01 60 00 01 00 00 00
|
||||
05 20 80 00 21 04 c0 20 40 01 8d 00 00 01 8d 00
|
||||
05 20 80 02 24 1c 00 20 c0 00 8d 00 01 00 00 00
|
||||
05 20 80 00 25 1c 80 20 00 01 8d 00 01 00 00 00
|
||||
05 00 60 00 25 1c 40 20 40 00 8d 00 01 00 00 00
|
||||
05 01 60 02 24 1c 01 20 20 01 60 00 01 00 00 00
|
||||
05 20 80 00 21 0c 80 21 50 00 00 00 00 00 00 80
|
||||
05 20 80 02 a5 1c c0 2d c0 00 8d 00 01 00 00 00
|
||||
05 02 00 00 01 0d 40 21 00 06 00 00 0f 00 00 00
|
||||
05 01 60 00 21 0c 21 22 20 00 00 00 00 00 00 80
|
||||
05 20 80 02 25 1c c0 20 80 00 8d 00 01 00 00 00
|
||||
05 01 60 00 21 04 a1 20 20 00 00 00 25 00 05 00
|
||||
05 01 60 00 25 1c 01 21 e0 00 60 00 01 00 00 00
|
||||
05 01 60 02 a5 1c c1 20 c0 00 60 00 01 00 00 00
|
||||
05 00 00 02 20 0c 00 20 38 00 00 00 00 00 00 04
|
||||
@@ -1,5 +0,0 @@
|
||||
asr(16) g4<1>D -g1.6<0,1,0>D 31D { align1 compr };
|
||||
asr.nz.f0.0(16) null<1>D -g1.6<0,1,0>D 31D { align1 compr };
|
||||
asr(8) g4<1>D g5<4>D g4<4>UD { align16 };
|
||||
asr(8) g11<1>.xD g5<4>.xD 0x00000002UD { align16 };
|
||||
asr(16) g10<1>D g6<8,8,1>D 0x00000002UD { align1 compr };
|
||||
@@ -1,5 +0,0 @@
|
||||
0c 20 80 00 a5 1c 80 20 38 40 00 00 1f 00 00 00
|
||||
0c 20 80 02 a4 1c 00 20 38 40 00 00 1f 00 00 00
|
||||
0c 01 60 00 a5 04 8f 20 a4 00 6e 00 84 00 6e 00
|
||||
0c 01 60 00 a5 0c 61 21 a0 00 60 00 02 00 00 00
|
||||
0c 20 80 00 a5 0c 40 21 c0 00 8d 00 02 00 00 00
|
||||
@@ -1,5 +0,0 @@
|
||||
(-f0.0) break(16) Jump: 10 Pop: 0 { align1 };
|
||||
break(16) Jump: 5 Pop: 1 { align1 };
|
||||
(+f0.0) break(16) Jump: 141 Pop: 0 { align1 };
|
||||
(+f0.0.x) break(8) Jump: 16 Pop: 0 { align16 };
|
||||
break(8) Jump: 6 Pop: 2 { align16 };
|
||||
@@ -1,5 +0,0 @@
|
||||
28 00 91 00 00 1c 00 34 00 14 60 00 0a 00 00 00
|
||||
28 00 80 00 00 1c 00 34 00 14 60 00 05 00 01 00
|
||||
28 00 81 00 00 1c 00 34 00 14 60 00 8d 00 00 00
|
||||
28 01 62 00 00 1c 0f 34 04 14 6e 00 10 00 00 00
|
||||
28 01 60 00 00 1c 0f 34 04 14 6e 00 06 00 02 00
|
||||
@@ -1,80 +0,0 @@
|
||||
cmp.nz.f0.0(8) null<1>F g3<0>.xyzzF 0x74746e64VF /* [10F, 15F, 20F, 20F]VF */ { align16 };
|
||||
cmp.nz.f0.0(8) null<1>D g7<4>.xyzzD 0D { align16 };
|
||||
cmp.ge.f0.0(16) g6<1>F g4<8,8,1>F 0x3189705fF /* 4e-09F */ { align1 compr };
|
||||
cmp.l.f0.0(16) g8<1>F g4<8,8,1>F 0x3189705fF /* 4e-09F */ { align1 compr };
|
||||
cmp.l.f0.0(16) g8<1>F g4<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
cmp.ge.f0.0(16) g10<1>F g4<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
cmp.z.f0.0(8) g10<1>.xD g4<0>.xD 0D { align16 };
|
||||
cmp.l.f0.0(8) g7<1>.xF g7<4>.xF 0x3189705fF /* 4e-09F */ { align16 };
|
||||
cmp.ge.f0.0(8) g6<1>.xF g2<0>.xF g6<4>.xF { align16 };
|
||||
cmp.z.f0.0(8) null<1>F g3<0>.zwwwF g3<0>.xyyyF { align16 };
|
||||
cmp.ge.f0.0(16) null<1>D g14<8,8,1>D 16D { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>D g2<0,1,0>D 1D { align1 compr };
|
||||
cmp.z.f0.0(16) g8<1>F g32<8,8,1>F g2.3<0,1,0>F { align1 compr };
|
||||
cmp.ge.f0.0(16) null<1>F g6<8,8,1>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.nz.f0.0(8) null<1>F g12<4>.xyyyF g1<0>.xyyyF { align16 };
|
||||
cmp.z.f0.0(8) null<1>D g6<4>D g2.4<0>D { align16 };
|
||||
cmp.z.f0.0(16) g6<1>D g2.1<0,1,0>D 39D { align1 compr };
|
||||
cmp.z.f0.0(16) g4<1>F g2.1<0,1,0>F 0x41000000F /* 8F */ { align1 compr };
|
||||
cmp.z.f0.0(8) g5<1>.xD g5<4>.xD g1<0>.zD { align16 };
|
||||
cmp.l.f0.0(8) g3<1>.xyF g1<0>.xyyyF g1<0>.zwwwF { align16 };
|
||||
cmp.z.f0.0(16) null<1>D g2<0,1,0>D 1D { align1 compr };
|
||||
cmp.z.f0.0(16) null<1>F g14<8,8,1>F g2.1<0,1,0>F { align1 compr };
|
||||
cmp.z.f0.0(8) g6<1>.xF g6<4>.xF g3<0>.yF { align16 };
|
||||
cmp.nz.f0.0(16) g4<1>F g6<8,8,1>F g2.2<0,1,0>F { align1 compr };
|
||||
cmp.ge.f0.0(16) null<1>F (abs)g16<8,8,1>F (abs)g8<8,8,1>F { align1 compr };
|
||||
cmp.nz.f0.0(16) null<1>D g2<0,1,0>D 0D { align1 compr };
|
||||
cmp.nz.f0.0(8) g5<1>F g5<8,8,1>F g38<8,8,1>F { align1 };
|
||||
cmp.ge.f0.0(8) null<1>.xD g5<4>.xD 4D { align16 };
|
||||
cmp.nz.f0.0(16) null<1>F g2.4<0,1,0>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.z.f0.0(16) null<1>F g4.1<0,1,0>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
cmp.ge.f0.0(16) g4<1>D g2<0,1,0>D 1D { align1 compr };
|
||||
cmp.nz.f0.0(16) g4<1>D g2.1<0,1,0>D 0D { align1 compr };
|
||||
cmp.z.f0.0(16) g8<1>D g6<8,8,1>D g2.5<0,1,0>D { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>F g4<8,8,1>F g2.5<0,1,0>F { align1 compr };
|
||||
cmp.l.f0.0(16) g6<1>D g3<0,1,0>D 1D { align1 compr };
|
||||
cmp.ge.f0.0(8) null<1>F g32<4>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.l.f0.0(8) null<1>F g23<4>.xF 0x43000000F /* 128F */ { align16 };
|
||||
cmp.le.f0.0(8) g32<1>.xF g32<4>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.ge.f0.0(16) g4<1>D g2.3<0,1,0>D g2<0,1,0>D { align1 compr };
|
||||
cmp.nz.f0.0(8) g3<1>.xD g1<0>.xD g1<0>.yD { align16 };
|
||||
cmp.nz.f0.0(8) g3<1>.xyzF g1<0>.xyzzF g1.4<0>.xyzzF { align16 };
|
||||
cmp.nz.f0.0(8) null<1>F g1<0>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.le.f0.0(8) g5<1>.xD g1<0>.xD 0D { align16 };
|
||||
cmp.l.f0.0(16) g4<1>D g2.1<0,1,0>D g2<0,1,0>D { align1 compr };
|
||||
cmp.ge.f0.0(8) g3<1>D g1<0>D g1.4<0>D { align16 };
|
||||
cmp.le.f0.0(16) null<1>F g4<8,8,1>F 0x3f000000F /* 0.5F */ { align1 compr };
|
||||
cmp.le.f0.0(16) g20<1>F g4<8,8,1>F 0x461c3f9aF /* 9999.9F */ { align1 compr };
|
||||
cmp.z.f0.0(8) null<1>F g3<0>.xyzzF 0x6e6e6c6aVF /* [13F, 14F, 15F, 15F]VF */ { align16 };
|
||||
cmp.nz.f0.0(8) null<1>D g1<0>.xyzzD g1.4<0>.xyzzD { align16 };
|
||||
cmp.ge.f0.0(8) null<1>.xD g5<4>.xD g3<0>.xD { align16 };
|
||||
cmp.nz.f0.0(16) g8<1>F g2.2<0,1,0>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.l.f0.0(8) null<1>F g1<0>F g3<4>F { align16 };
|
||||
cmp.g.f0.0(8) g7<1>.xF g2<4>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.g.f0.0(8) null<1>.xF g2<4>.yF 0x0F /* 0F */ { align16 };
|
||||
cmp.nz.f0.0(16) null<1>D g16<8,8,1>D g12<8,8,1>D { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>F g2<0,1,0>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.z.f0.0(8) null<1>.xD g1<0>.xD 1D { align16 };
|
||||
cmp.nz.f0.0(16) g6<1>D g4<8,8,1>D g2.2<0,1,0>D { align1 compr };
|
||||
cmp.g.f0.0(16) g16<1>F (abs)g8<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
cmp.l.f0.0(8) g5<1>.xD g1<0>.yD g1<0>.xD { align16 };
|
||||
cmp.ge.f0.0(8) g6<1>.xF g3<4>.xF 0x41f00000F /* 30F */ { align16 };
|
||||
cmp.g.f0.0(16) null<1>D g2.1<0,1,0>D 0D { align1 compr };
|
||||
cmp.ge.f0.0(16) null<1>D g4<8,8,1>D g2.1<0,1,0>D { align1 compr };
|
||||
cmp.le.f0.0(8) null<1>.xF g8<4>.xF 0x3f000000F /* 0.5F */ { align16 };
|
||||
cmp.ge.f0.0(8) null<1>.xF g22<4>.xF g10<4>.xF { align16 };
|
||||
cmp.z.f0.0(8) g9<1>.xF g1<0>.xF 0x40b79581F /* 5.737F */ { align16 };
|
||||
cmp.z.f0.0(16) null<1>D g6<8,8,1>D g2<0,1,0>D { align1 compr };
|
||||
cmp.nz.f0.0(16) null<1>F g4<8,8,1>F g8<8,8,1>F { align1 compr };
|
||||
(+f0.1) cmp.z.f0.1(16) null<1>D g6<8,8,1>D 0D { align1 compr };
|
||||
cmp.nz.f0.0(8) g11<1>.xD g4<4>.xD 10D { align16 };
|
||||
cmp.nz.f0.0(8) g3<1>F g3<4>F 0x0F /* 0F */ { align16 };
|
||||
cmp.le.f0.0(16) g4<1>D g2<0,1,0>D 0D { align1 compr };
|
||||
cmp.l.f0.0(8) null<1>.xD g6<4>.xD g5<4>.xD { align16 };
|
||||
cmp.ge.f0.0(8) g10<1>.xD g5<4>.xD 2D { align16 };
|
||||
cmp.g.f0.0(8) null<1>.xD g3<0>.zD 4D { align16 };
|
||||
cmp.g.f0.0(16) null<1>F g20<8,8,1>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>D g2<0,1,0>D g6<8,8,1>D { align1 compr };
|
||||
(+f0.1) cmp.nz.f0.1(16) null<1>UW g0<8,8,1>UW g0<8,8,1>UW { align1 };
|
||||
cmp.le.f0.0(8) g3<1>.xUD g1<0>.xUD 0x00000001UD { align16 };
|
||||
cmp.g.f0.0(8) g8<1>.xD g1<0>.xD 2D { align16 };
|
||||
@@ -1,80 +0,0 @@
|
||||
10 01 60 02 bc 5f 0f 20 64 00 0a 00 64 6e 74 74
|
||||
10 01 60 02 a4 1c 0f 20 e4 00 6a 00 00 00 00 00
|
||||
10 20 80 04 bd 7f c0 20 80 00 8d 00 5f 70 89 31
|
||||
10 20 80 05 bd 7f 00 21 80 00 8d 00 5f 70 89 31
|
||||
10 20 80 05 bd 77 00 21 80 00 8d 00 c0 00 8d 00
|
||||
10 20 80 04 bd 77 40 21 80 00 8d 00 c0 00 8d 00
|
||||
10 01 60 01 a5 1c 41 21 80 00 00 00 00 00 00 00
|
||||
10 01 60 05 bd 7f e1 20 e0 00 60 00 5f 70 89 31
|
||||
10 01 60 04 bd 77 c1 20 40 00 00 00 c0 00 60 00
|
||||
10 01 60 01 bc 77 0f 20 6e 00 0f 00 64 00 05 00
|
||||
10 20 80 04 a4 1c 00 20 c0 01 8d 00 10 00 00 00
|
||||
10 20 80 05 a4 1c 00 20 40 00 00 00 01 00 00 00
|
||||
10 20 80 01 bd 77 00 21 00 04 8d 00 4c 00 00 00
|
||||
10 20 80 04 bc 7f 00 20 c0 00 8d 00 00 00 00 00
|
||||
10 01 60 02 bc 77 0f 20 84 01 65 00 24 00 05 00
|
||||
10 01 60 01 a4 14 0f 20 c4 00 6e 00 54 00 0e 00
|
||||
10 20 80 01 a5 1c c0 20 44 00 00 00 27 00 00 00
|
||||
10 20 80 01 bd 7f 80 20 44 00 00 00 00 00 00 41
|
||||
10 01 60 01 a5 14 a1 20 a0 00 60 00 2a 00 0a 00
|
||||
10 01 60 05 bd 77 63 20 24 00 05 00 2e 00 0f 00
|
||||
10 20 80 01 a4 1c 00 20 40 00 00 00 01 00 00 00
|
||||
10 20 80 01 bc 77 00 20 c0 01 8d 00 44 00 00 00
|
||||
10 01 60 01 bd 77 c1 20 c0 00 60 00 65 00 05 00
|
||||
10 20 80 02 bd 77 80 20 c0 00 8d 00 48 00 00 00
|
||||
10 20 80 04 bc 77 00 20 00 22 8d 00 00 21 8d 00
|
||||
10 20 80 02 a4 1c 00 20 40 00 00 00 00 00 00 00
|
||||
10 00 60 02 bd 77 a0 20 a0 00 8d 00 c0 04 8d 00
|
||||
10 01 60 04 a4 1c 01 20 a0 00 60 00 04 00 00 00
|
||||
10 20 80 02 bc 7f 00 20 50 00 00 00 00 00 00 00
|
||||
10 20 80 01 bc 7f 00 20 84 00 00 00 00 00 80 3f
|
||||
10 20 80 04 a5 1c 80 20 40 00 00 00 01 00 00 00
|
||||
10 20 80 02 a5 1c 80 20 44 00 00 00 00 00 00 00
|
||||
10 20 80 01 a5 14 00 21 c0 00 8d 00 54 00 00 00
|
||||
10 20 80 05 bc 77 00 20 80 00 8d 00 54 00 00 00
|
||||
10 20 80 05 a5 1c c0 20 60 00 00 00 01 00 00 00
|
||||
10 01 60 04 bc 7f 0f 20 00 04 60 00 00 00 00 00
|
||||
10 01 60 05 bc 7f 0f 20 e0 02 60 00 00 00 00 43
|
||||
10 01 60 06 bd 7f 01 24 00 04 60 00 00 00 00 00
|
||||
10 20 80 04 a5 14 80 20 4c 00 00 00 40 00 00 00
|
||||
10 01 60 02 a5 14 61 20 20 00 00 00 25 00 05 00
|
||||
10 01 60 02 bd 77 67 20 24 00 0a 00 34 00 0a 00
|
||||
10 01 60 02 bc 7f 0f 20 20 00 00 00 00 00 00 00
|
||||
10 01 60 06 a5 1c a1 20 20 00 00 00 00 00 00 00
|
||||
10 20 80 05 a5 14 80 20 44 00 00 00 40 00 00 00
|
||||
10 01 60 04 a5 14 6f 20 24 00 0e 00 34 00 0e 00
|
||||
10 20 80 06 bc 7f 00 20 80 00 8d 00 00 00 00 3f
|
||||
10 20 80 06 bd 7f 80 22 80 00 8d 00 9a 3f 1c 46
|
||||
10 01 60 01 bc 5f 0f 20 64 00 0a 00 6a 6c 6e 6e
|
||||
10 01 60 02 a4 14 0f 20 24 00 0a 00 34 00 0a 00
|
||||
10 01 60 04 a4 14 01 20 a0 00 60 00 60 00 00 00
|
||||
10 20 80 02 bd 7f 00 21 48 00 00 00 00 00 00 00
|
||||
10 01 60 05 bc 77 0f 20 24 00 0e 00 64 00 6e 00
|
||||
10 01 60 03 bd 7f e1 20 40 00 60 00 00 00 00 00
|
||||
10 01 60 03 bc 7f 01 20 45 00 65 00 00 00 00 00
|
||||
10 20 80 02 a4 14 00 20 00 02 8d 00 80 01 8d 00
|
||||
10 20 80 05 bc 7f 00 20 40 00 00 00 00 00 00 00
|
||||
10 01 60 01 a4 1c 01 20 20 00 00 00 01 00 00 00
|
||||
10 20 80 02 a5 14 c0 20 80 00 8d 00 48 00 00 00
|
||||
10 20 80 03 bd 7f 00 22 00 21 8d 00 00 00 80 3f
|
||||
10 01 60 05 a5 14 a1 20 25 00 05 00 20 00 00 00
|
||||
10 01 60 04 bd 7f c1 20 60 00 60 00 00 00 f0 41
|
||||
10 20 80 03 a4 1c 00 20 44 00 00 00 00 00 00 00
|
||||
10 20 80 04 a4 14 00 20 80 00 8d 00 44 00 00 00
|
||||
10 01 60 06 bc 7f 01 20 00 01 60 00 00 00 00 3f
|
||||
10 01 60 04 bc 77 01 20 c0 02 60 00 40 01 60 00
|
||||
10 01 60 01 bd 7f 21 21 20 00 00 00 81 95 b7 40
|
||||
10 20 80 01 a4 14 00 20 c0 00 8d 00 40 00 00 00
|
||||
10 20 80 02 bc 77 00 20 80 00 8d 00 00 01 8d 00
|
||||
10 20 81 01 a4 1c 00 20 c0 00 8d 02 00 00 00 00
|
||||
10 01 60 02 a5 1c 61 21 80 00 60 00 0a 00 00 00
|
||||
10 01 60 02 bd 7f 6f 20 64 00 6e 00 00 00 00 00
|
||||
10 20 80 06 a5 1c 80 20 40 00 00 00 00 00 00 00
|
||||
10 01 60 05 a4 14 01 20 c0 00 60 00 a0 00 60 00
|
||||
10 01 60 04 a5 1c 41 21 a0 00 60 00 02 00 00 00
|
||||
10 01 60 03 a4 1c 01 20 6a 00 0a 00 04 00 00 00
|
||||
10 20 80 03 bc 7f 00 20 80 02 8d 00 00 00 00 00
|
||||
10 20 80 05 a4 14 00 20 40 00 00 00 c0 00 8d 00
|
||||
10 00 81 02 28 25 00 20 00 00 8d 02 00 00 8d 00
|
||||
10 01 60 06 21 0c 61 20 20 00 00 00 01 00 00 00
|
||||
10 01 60 03 a5 1c 01 21 20 00 00 00 02 00 00 00
|
||||
@@ -1,2 +0,0 @@
|
||||
cont(16) Jump: 4 Pop: 1 { align1 };
|
||||
cont(8) Jump: 4 Pop: 1 { align16 };
|
||||
@@ -1,2 +0,0 @@
|
||||
29 00 80 00 00 1c 00 34 00 14 60 00 04 00 01 00
|
||||
29 01 60 00 00 1c 0f 34 04 14 6e 00 04 00 01 00
|
||||
@@ -1,2 +0,0 @@
|
||||
do(16) { align1 };
|
||||
do(8) { align16 };
|
||||
@@ -1,2 +0,0 @@
|
||||
26 00 80 00 9c 73 00 20 00 00 8d 00 00 00 8d 00
|
||||
26 01 60 00 9c 73 0f 20 04 00 6e 00 04 00 6e 00
|
||||
@@ -1,7 +0,0 @@
|
||||
dp2(8) g7<1>.xF g7<4>.xyyyF g7<4>.xyyyF { align16 };
|
||||
dp2(8) m5<1>.xF g1<0>.yF g1<0>.yF { align16 };
|
||||
dp2(8) m5<1>.yzF g1<0>.xF g1<0>.zwwwF { align16 NoDDClr };
|
||||
dp2(8) m5<1>.wF g1<0>.ywwwF g1<0>.wyyyF { align16 NoDDChk };
|
||||
dp2(8) g4<1>.yF g1<0>.xyyyF g1.4<0>.xyyyF { align16 NoDDClr };
|
||||
dp2(8) g4<1>.zF g1<0>.xyyyF g1.4<0>.zwwwF { align16 NoDDClr,NoDDChk };
|
||||
dp2(8) g4<1>.wF g1<0>.xyyyF g2<0>.xyyyF { align16 NoDDChk };
|
||||
@@ -1,7 +0,0 @@
|
||||
57 01 60 00 bd 77 e1 20 e4 00 65 00 e4 00 65 00
|
||||
57 01 60 00 be 77 a1 20 25 00 05 00 25 00 05 00
|
||||
57 05 60 00 be 77 a6 20 20 00 00 00 2e 00 0f 00
|
||||
57 09 60 00 be 77 a8 20 2d 00 0f 00 27 00 05 00
|
||||
57 05 60 00 bd 77 82 20 24 00 05 00 34 00 05 00
|
||||
57 0d 60 00 bd 77 84 20 24 00 05 00 3e 00 0f 00
|
||||
57 09 60 00 bd 77 88 20 24 00 05 00 44 00 05 00
|
||||
@@ -1,9 +0,0 @@
|
||||
dp3(8) g5<1>.xF g5<4>.xyzzF g5<4>.xyzzF { align16 };
|
||||
dp3(8) m5<1>.xF g3<0>.xyzzF g6<4>.xyzzF { align16 NoDDClr };
|
||||
dp3(8) m5<1>.yF g3.4<0>.xyzzF g6<4>.xyzzF { align16 NoDDClr,NoDDChk };
|
||||
dp3(8) g19<1>.xF g3<0>.xyzzF g3.4<0>.xyzzF { align16 NoDDClr };
|
||||
dp3(8) g19<1>.yF g3<0>.xyzzF g4<0>.xyzzF { align16 NoDDClr,NoDDChk };
|
||||
dp3(8) g19<1>.zF g3<0>.xyzzF g4.4<0>.xyzzF { align16 NoDDChk };
|
||||
dp3(8) m5<1>.xF g4<4>.xyzzF g5<4>.xyzzF { align16 };
|
||||
dp3.le.f0.0(8) g18<1>.xF g17<4>.xyzzF g3.4<0>.xyzzF { align16 };
|
||||
dp3.sat(8) g4<1>.xF g4<4>.xyzzF g5<4>.xyzzF { align16 };
|
||||
@@ -1,9 +0,0 @@
|
||||
56 01 60 00 bd 77 a1 20 a4 00 6a 00 a4 00 6a 00
|
||||
56 05 60 00 be 77 a1 20 64 00 0a 00 c4 00 6a 00
|
||||
56 0d 60 00 be 77 a2 20 74 00 0a 00 c4 00 6a 00
|
||||
56 05 60 00 bd 77 61 22 64 00 0a 00 74 00 0a 00
|
||||
56 0d 60 00 bd 77 62 22 64 00 0a 00 84 00 0a 00
|
||||
56 09 60 00 bd 77 64 22 64 00 0a 00 94 00 0a 00
|
||||
56 01 60 00 be 77 a1 20 84 00 6a 00 a4 00 6a 00
|
||||
56 01 60 06 bd 77 41 22 24 02 6a 00 74 00 0a 00
|
||||
56 01 60 80 bd 77 81 20 84 00 6a 00 a4 00 6a 00
|
||||
@@ -1,5 +0,0 @@
|
||||
dp4(8) g6<1>.xF g3<4>F g1<0>F { align16 };
|
||||
dp4(8) g4<1>.xF g5<4>F g1<0>F { align16 NoDDClr };
|
||||
dp4(8) g4<1>.yF g5<4>F g1.4<0>F { align16 NoDDClr,NoDDChk };
|
||||
dp4(8) g4<1>.wF g5<4>F g2.4<0>F { align16 NoDDChk };
|
||||
dp4(8) m5<1>.xF g4<4>F g5<4>F { align16 };
|
||||
@@ -1,5 +0,0 @@
|
||||
54 01 60 00 bd 77 c1 20 64 00 6e 00 24 00 0e 00
|
||||
54 05 60 00 bd 77 81 20 a4 00 6e 00 24 00 0e 00
|
||||
54 0d 60 00 bd 77 82 20 a4 00 6e 00 34 00 0e 00
|
||||
54 09 60 00 bd 77 88 20 a4 00 6e 00 54 00 0e 00
|
||||
54 01 60 00 be 77 a1 20 84 00 6e 00 a4 00 6e 00
|
||||
@@ -1,5 +0,0 @@
|
||||
dph(8) m5<1>.xF g4<4>.xyzxF g5<4>F { align16 };
|
||||
dph.sat(8) m5<1>F g1<0>.xyzxF g3<4>F { align16 };
|
||||
dph(8) g5<1>.xF g4<4>.xyzxF g1<0>F { align16 NoDDClr };
|
||||
dph(8) g5<1>.yF g4<4>.xyzxF g1.4<0>F { align16 NoDDClr,NoDDChk };
|
||||
dph(8) g6<1>.wF g5<4>.xyzxF g2.4<0>F { align16 NoDDChk };
|
||||
@@ -1,5 +0,0 @@
|
||||
55 01 60 00 be 77 a1 20 84 00 62 00 a4 00 6e 00
|
||||
55 01 60 80 be 77 af 20 24 00 02 00 64 00 6e 00
|
||||
55 05 60 00 bd 77 a1 20 84 00 62 00 24 00 0e 00
|
||||
55 0d 60 00 bd 77 a2 20 84 00 62 00 34 00 0e 00
|
||||
55 09 60 00 bd 77 c8 20 a4 00 62 00 54 00 0e 00
|
||||
@@ -1,2 +0,0 @@
|
||||
else(16) Jump: 7 Pop: 1 { align1 switch };
|
||||
else(8) Jump: 3 Pop: 1 { align16 switch };
|
||||
@@ -1,2 +0,0 @@
|
||||
24 80 80 00 00 1c 00 34 00 14 60 00 07 00 01 00
|
||||
24 81 60 00 00 1c 0f 34 04 14 6e 00 03 00 01 00
|
||||
@@ -1,2 +0,0 @@
|
||||
endif(16) Pop: 1 { align1 switch };
|
||||
endif(8) Pop: 1 { align16 switch };
|
||||
@@ -1,2 +0,0 @@
|
||||
25 80 80 00 84 1c 00 20 00 00 8d 00 00 00 01 00
|
||||
25 81 60 00 84 1c 0f 20 04 00 6e 00 00 00 01 00
|
||||
@@ -1,4 +0,0 @@
|
||||
frc.sat(8) m5<1>F g3<4>F { align16 };
|
||||
frc(8) g7<1>.xF (abs)g1<0>.xF { align16 };
|
||||
frc(16) g4<1>F g2<0,1,0>F { align1 compr };
|
||||
frc(16) m3<1>F g10<8,8,1>F { align1 compr4 };
|
||||
@@ -1,4 +0,0 @@
|
||||
43 01 60 80 be 03 af 20 64 00 6e 00 00 00 00 00
|
||||
43 01 60 00 bd 03 e1 20 20 20 00 00 00 00 00 00
|
||||
43 20 80 00 bd 03 80 20 40 00 00 00 00 00 00 00
|
||||
43 20 80 00 be 03 60 30 40 01 8d 00 00 00 00 00
|
||||
@@ -1,2 +0,0 @@
|
||||
(+f0.0) if(16) Jump: 15 { align1 switch };
|
||||
(+f0.0.x) if(8) Jump: 7 { align16 switch };
|
||||
@@ -1,2 +0,0 @@
|
||||
22 80 81 00 00 1c 00 34 00 14 60 00 0f 00 00 00
|
||||
22 81 62 00 00 1c 0f 34 04 14 6e 00 07 00 00 00
|
||||
@@ -1,3 +0,0 @@
|
||||
(-f0.0) iff(16) Jump: 5 { align1 switch };
|
||||
(+f0.0.x) iff(8) Jump: 11 { align16 switch };
|
||||
(+f0.0) iff(16) Jump: 7 { align1 switch };
|
||||
@@ -1,3 +0,0 @@
|
||||
23 80 91 00 00 1c 00 34 00 14 60 00 05 00 00 00
|
||||
23 81 62 00 00 1c 0f 34 04 14 6e 00 0b 00 00 00
|
||||
23 80 81 00 00 1c 00 34 00 14 60 00 07 00 00 00
|
||||
@@ -1 +0,0 @@
|
||||
(+f0.0) jmpi(1) 0x00000002UD { align1 nomask };
|
||||
@@ -1 +0,0 @@
|
||||
20 02 01 00 00 0c 00 34 00 14 00 00 02 00 00 00
|
||||
@@ -1 +0,0 @@
|
||||
mach(8) null<1>D g1<0>.xD g1<0>.yD { align16 };
|
||||
@@ -1 +0,0 @@
|
||||
49 01 60 00 a4 14 0f 20 20 00 00 00 25 00 05 00
|
||||
@@ -1,102 +0,0 @@
|
||||
mov(8) m2<1>UD g1<8,8,1>UD { align1 nomask };
|
||||
mov(8) g9<1>.xyzUD 0x00000000UD { align16 };
|
||||
mov.sat(8) m5<1>F g4<4>F { align16 };
|
||||
mov(8) m4<1>F g6<4>F { align16 };
|
||||
mov(8) m2<1>UD g9<4>UD { align16 };
|
||||
mov(16) g6<1>D 1065353216D { align1 compr };
|
||||
mov.nz.f0.0(16) null<1>D g2<0,1,0>D { align1 compr };
|
||||
mov(16) m3<1>F 0x0F /* 0F */ { align1 compr4 };
|
||||
mov(16) m4<1>F g4<8,8,1>F { align1 compr4 };
|
||||
mov(8) m2<1>UD 0x00000000UD { align16 };
|
||||
mov(8) g8<1>F 0x30003000VF /* [0F, 1F, 0F, 1F]VF */ { align16 };
|
||||
mov(8) g7<1>.xD 0D { align16 };
|
||||
(+f0.0.any4h) mov(8) g7<1>.xD -1D { align16 };
|
||||
mov(16) m3<1>F g4<8,8,1>D { align1 compr4 };
|
||||
mov(1) m14<1>D 0D { align1 nomask };
|
||||
mov(8) m15<1>D g3<0>D { align16 };
|
||||
mov(1) m14<1>D g8<0,1,0>D { align1 nomask };
|
||||
mov(16) g12<1>F g4<8,8,1>UW { align1 compr };
|
||||
mov(16) g4<1>D g12<8,8,1>F { align1 compr };
|
||||
mov(16) g12<1>F g4<8,8,1>D { align1 compr };
|
||||
mov(8) m15<1>D g2<4>.xUD { align16 };
|
||||
mov(8) g7<1>.xD g4<0>.yD { align16 };
|
||||
mov(8) g7<1>.xD g10<4>.xD { align16 NoDDClr };
|
||||
mov(8) g7<1>.yD g4<0>.yD { align16 NoDDChk };
|
||||
mov(16) m2<1>UD 0x00000000UD { align1 compr };
|
||||
mov(16) m6<1>D g9.3<0,1,0>D { align1 compr };
|
||||
mov(16) m8<1>UD 0D { align1 compr };
|
||||
mov(16) m2<1>D g4<8,8,1>F { align1 compr };
|
||||
mov(8) m5<1>.xF g3<4>.xD { align16 NoDDClr };
|
||||
mov(8) m5<1>.yzwD 0D { align16 NoDDChk };
|
||||
mov.sat(16) m3<1>F g2<0,1,0>F { align1 compr4 };
|
||||
mov(8) m6<1>F 0x50484030VF /* [1F, 2F, 3F, 4F]VF */ { align16 };
|
||||
mov(8) m3<1>F 0x42fc6666F /* 126.2F */ { align1 };
|
||||
mov(8) m3<1>F 0x42fc6666F /* 126.2F */ { align1 sechalf };
|
||||
mov(8) m5<1>.wD g8<4>.wD { align16 NoDDChk };
|
||||
mov(8) g6<1>.xD g6<4>.xF { align16 };
|
||||
mov(8) m3<1>F g[a0]<VxH,1,0>F { align1 };
|
||||
mov(8) m7<1>F g[a0]<VxH,1,0>F { align1 sechalf };
|
||||
mov(8) g20<1>.yD -1070881309D { align16 NoDDClr };
|
||||
mov(8) g20<1>.zD 1091044167D { align16 NoDDChk };
|
||||
mov(8) g28<1>.zD -1102236248D { align16 NoDDClr,NoDDChk };
|
||||
mov(8) g5<1>.xD acc0<4>D { align16 };
|
||||
mov(8) m13<1>.wD 1107296256D { align16 NoDDClr };
|
||||
mov(8) g11<1>.yzwD 0x48403000VF /* [0F, 1F, 2F, 3F]VF */ { align16 };
|
||||
mov(8) m13<1>.xyzF 0x7f7e7dVF /* [29F, 30F, 31F, 0F]VF */ { align16 NoDDChk };
|
||||
mov(16) m3<1>UD g4<8,8,1>UD { align1 compr4 };
|
||||
mov(8) m6<1>.xF 0x0F /* 0F */ { align16 };
|
||||
(+f0.0.all4h) mov(8) g3<1>.xD -1D { align16 };
|
||||
mov(8) g3<1>F g2<0,1,0>D { align1 };
|
||||
mov(8) m3<1>F g2<8,8,1>D { align1 };
|
||||
mov(8) m5<1>.yF g3<4>.xD { align16 NoDDClr,NoDDChk };
|
||||
mov(8) m5<1>.wF g3<4>.xD { align16 NoDDChk };
|
||||
mov(8) g3<1>.xF g3<4>.xD { align16 NoDDClr };
|
||||
mov(8) g3<1>.yF g4<4>.xD { align16 NoDDClr,NoDDChk };
|
||||
mov(8) g3<1>.wF g4<4>.xD { align16 NoDDChk };
|
||||
mov(8) g8<1>UD g2<4>UD { align16 };
|
||||
mov(8) g7<1>.xF g3<0>.xD { align16 };
|
||||
mov(8) g6<1>.xF -g5<4>.yF { align16 NoDDClr };
|
||||
mov.nz.f0.0(16) g4<1>F -(abs)g2<0,1,0>F { align1 compr };
|
||||
(+f0.0) mov(16) g4<1>F 0xbf800000F /* -1F */ { align1 compr };
|
||||
mov(16) g24<1>D g42<8,8,1>D { align1 compr };
|
||||
mov(8) g8<1>F g[a0]<VxH,1,0>F { align1 };
|
||||
mov(8) g9<1>F g[a0]<VxH,1,0>F { align1 sechalf };
|
||||
mov(8) g3<1>.xyzF 0x0F /* 0F */ { align16 };
|
||||
mov(16) m2<1>UD g28<8,8,1>UW { align1 compr };
|
||||
mov(8) m3<1>D g2<0,1,0>D { align1 };
|
||||
mov(8) m3<1>D g2<0,1,0>D { align1 sechalf };
|
||||
mov(1) m14.2<1>UD 0x00000000UD { align1 nomask };
|
||||
mov(8) g5<1>.zD g1.4<0>.xD { align16 NoDDClr,NoDDChk };
|
||||
mov.sat(8) m5<1>.wF g20<4>.wF { align16 NoDDChk };
|
||||
mov(8) g26<1>.xyzUD 0x00000000UD { align16 NoDDClr };
|
||||
mov(8) m9<1>.xyD g4<0>.yzzzD { align16 NoDDClr };
|
||||
mov(8) m5<1>F g3<4>D { align16 };
|
||||
mov(8) m3<1>F g4<8,8,1>F { align1 nomask };
|
||||
mov.sat(8) m5<1>.zF 0x3eaaaaabF /* 0.333333F */ { align16 };
|
||||
mov.sat(8) m5<1>.wF 0x3dcccccdF /* 0.1F */ { align16 NoDDClr };
|
||||
mov(8) m5<1>.zD g3<4>.zD { align16 NoDDClr,NoDDChk };
|
||||
mov(8) m13<1>.yD 1107820544D { align16 NoDDClr,NoDDChk };
|
||||
mov.sat(8) m5<1>.wF 0x3f800000F /* 1F */ { align16 NoDDChk };
|
||||
mov.sat(8) m5<1>F g3<4>D { align16 };
|
||||
mov.sat(8) m5<1>.zF 0x3f666660F /* 0.9F */ { align16 NoDDClr,NoDDChk };
|
||||
mov(16) g10<1>F g2<0,1,0>F { align1 compr };
|
||||
mov(16) g10<1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
mov(8) m15<1>D 0D { align16 };
|
||||
mov.sat(16) g4<1>F g2<0,1,0>F { align1 compr };
|
||||
mov(8) g2<1>.xyzF g2<4>.wF { align16 };
|
||||
mov(8) g5<1>.xyzF 0x7f7e7dVF /* [29F, 30F, 31F, 0F]VF */ { align16 NoDDChk };
|
||||
mov.sat(8) m5<1>.xF g4<4>.xF { align16 NoDDClr };
|
||||
mov.sat(8) m5<1>.yzF g5<4>.xxyyF { align16 NoDDClr,NoDDChk };
|
||||
mov(1) f0.1<1>UW g0<0,1,0>UW { align1 nomask };
|
||||
mov(1) g0<1>UW f0.1<0,1,0>UW { align1 nomask };
|
||||
mov(8) m5<1>.zwF 0x30000000VF /* [0F, 0F, 0F, 1F]VF */ { align16 NoDDClr };
|
||||
mov.sat(8) m5<1>.xF g5<4>.xD { align16 NoDDClr };
|
||||
mov.sat(8) m5<1>.yF g5<4>.xD { align16 NoDDClr,NoDDChk };
|
||||
mov.sat(8) m5<1>.wF g5<4>.xD { align16 NoDDChk };
|
||||
mov(8) g6<1>.yzD 0xf7c000VF /* [0F, -2F, -23F, 0F]VF */ { align16 NoDDChk };
|
||||
mov(8) m2<1>.xyzUD 0x00000000UD { align16 NoDDClr };
|
||||
mov(8) m2<1>.wUD g8<4>.xUD { align16 NoDDChk };
|
||||
mov(8) g5<1>F g3<4>UD { align16 };
|
||||
mov.nz.f0.0(8) null<1>.xD g8<4>.xD { align16 };
|
||||
mov.nz.f0.0(8) g8<1>F -(abs)g1<0>F { align16 };
|
||||
(+f0.0) mov(8) g8<1>F 0xbf800000F /* -1F */ { align16 };
|
||||
@@ -1,102 +0,0 @@
|
||||
01 02 60 00 22 00 40 20 20 00 8d 00 00 00 00 00
|
||||
01 01 60 00 61 00 27 21 00 00 00 00 00 00 00 00
|
||||
01 01 60 80 be 03 af 20 84 00 6e 00 00 00 00 00
|
||||
01 01 60 00 be 03 8f 20 c4 00 6e 00 00 00 00 00
|
||||
01 01 60 00 22 00 4f 20 24 01 6e 00 00 00 00 00
|
||||
01 20 80 00 e5 10 c0 20 00 00 00 00 00 00 80 3f
|
||||
01 20 80 02 a4 00 00 20 40 00 00 00 00 00 00 00
|
||||
01 20 80 00 fe 73 60 30 00 00 00 00 00 00 00 00
|
||||
01 20 80 00 be 03 80 30 80 00 8d 00 00 00 00 00
|
||||
01 01 60 00 62 00 4f 20 00 00 00 00 00 00 00 00
|
||||
01 01 60 00 fd 52 0f 21 00 00 00 00 00 30 00 30
|
||||
01 01 60 00 e5 10 e1 20 00 00 00 00 00 00 00 00
|
||||
01 01 66 00 e5 10 e1 20 00 00 00 00 ff ff ff ff
|
||||
01 20 80 00 be 00 60 30 80 00 8d 00 00 00 00 00
|
||||
01 02 00 00 e6 10 c0 21 00 00 00 00 00 00 00 00
|
||||
01 01 60 00 a6 00 ef 21 64 00 0e 00 00 00 00 00
|
||||
01 02 00 00 a6 00 c0 21 00 01 00 00 00 00 00 00
|
||||
01 20 80 00 3d 01 80 21 80 00 8d 00 00 00 00 00
|
||||
01 20 80 00 a5 03 80 20 80 01 8d 00 00 00 00 00
|
||||
01 20 80 00 bd 00 80 21 80 00 8d 00 00 00 00 00
|
||||
01 01 60 00 26 00 ef 21 40 00 60 00 00 00 00 00
|
||||
01 01 60 00 a5 00 e1 20 85 00 05 00 00 00 00 00
|
||||
01 05 60 00 a5 00 e1 20 40 01 60 00 00 00 00 00
|
||||
01 09 60 00 a5 00 e2 20 85 00 05 00 00 00 00 00
|
||||
01 20 80 00 62 00 40 20 00 00 00 00 00 00 00 00
|
||||
01 20 80 00 a6 00 c0 20 2c 01 00 00 00 00 00 00
|
||||
01 20 80 00 e2 10 00 21 00 00 00 00 00 00 00 00
|
||||
01 20 80 00 a6 03 40 20 80 00 8d 00 00 00 00 00
|
||||
01 05 60 00 be 00 a1 20 60 00 60 00 00 00 00 00
|
||||
01 09 60 00 e6 10 ae 20 00 00 00 00 00 00 00 00
|
||||
01 20 80 80 be 03 60 30 40 00 00 00 00 00 00 00
|
||||
01 01 60 00 fe 52 cf 20 00 00 00 00 30 40 48 50
|
||||
01 00 60 00 fe 73 60 20 00 00 00 00 66 66 fc 42
|
||||
01 10 60 00 fe 73 60 20 00 00 00 00 66 66 fc 42
|
||||
01 09 60 00 a6 00 a8 20 0f 01 6f 00 00 00 00 00
|
||||
01 01 60 00 a5 03 c1 20 c0 00 60 00 00 00 00 00
|
||||
01 00 60 00 be 03 60 20 00 80 e0 01 00 00 00 00
|
||||
01 10 60 00 be 03 e0 20 00 80 e0 01 00 00 00 00
|
||||
01 05 60 00 e5 10 82 22 00 00 00 00 e3 a5 2b c0
|
||||
01 09 60 00 e5 10 84 22 00 00 00 00 47 03 08 41
|
||||
01 0d 60 00 e5 10 84 23 00 00 00 00 a8 35 4d be
|
||||
01 01 60 00 85 00 a1 20 04 04 6e 00 00 00 00 00
|
||||
01 05 60 00 e6 10 a8 21 00 00 00 00 00 00 00 42
|
||||
01 01 60 00 e5 52 6e 21 00 00 00 00 00 30 40 48
|
||||
01 09 60 00 fe 52 a7 21 00 00 00 00 7d 7e 7f 00
|
||||
01 20 80 00 22 00 60 30 80 00 8d 00 00 00 00 00
|
||||
01 01 60 00 fe 73 c1 20 00 00 00 00 00 00 00 00
|
||||
01 01 67 00 e5 10 61 20 00 00 00 00 ff ff ff ff
|
||||
01 00 60 00 bd 00 60 20 40 00 00 00 00 00 00 00
|
||||
01 00 60 00 be 00 60 20 40 00 8d 00 00 00 00 00
|
||||
01 0d 60 00 be 00 a2 20 60 00 60 00 00 00 00 00
|
||||
01 09 60 00 be 00 a8 20 60 00 60 00 00 00 00 00
|
||||
01 05 60 00 bd 00 61 20 60 00 60 00 00 00 00 00
|
||||
01 0d 60 00 bd 00 62 20 80 00 60 00 00 00 00 00
|
||||
01 09 60 00 bd 00 68 20 80 00 60 00 00 00 00 00
|
||||
01 01 60 00 21 00 0f 21 44 00 6e 00 00 00 00 00
|
||||
01 01 60 00 bd 00 e1 20 60 00 00 00 00 00 00 00
|
||||
01 05 60 00 bd 03 c1 20 a5 40 65 00 00 00 00 00
|
||||
01 20 80 02 bd 03 80 20 40 60 00 00 00 00 00 00
|
||||
01 20 81 00 fd 73 80 20 00 00 00 00 00 00 80 bf
|
||||
01 20 80 00 a5 00 00 23 40 05 8d 00 00 00 00 00
|
||||
01 00 60 00 bd 03 00 21 00 80 e0 01 00 00 00 00
|
||||
01 10 60 00 bd 03 20 21 00 80 e0 01 00 00 00 00
|
||||
01 01 60 00 fd 73 67 20 00 00 00 00 00 00 00 00
|
||||
01 20 80 00 22 01 40 20 80 03 8d 00 00 00 00 00
|
||||
01 00 60 00 a6 00 60 20 40 00 00 00 00 00 00 00
|
||||
01 10 60 00 a6 00 60 20 40 00 00 00 00 00 00 00
|
||||
01 02 00 00 62 00 c8 21 00 00 00 00 00 00 00 00
|
||||
01 0d 60 00 a5 00 a4 20 30 00 00 00 00 00 00 00
|
||||
01 09 60 80 be 03 a8 20 8f 02 6f 00 00 00 00 00
|
||||
01 05 60 00 61 00 47 23 00 00 00 00 00 00 00 00
|
||||
01 05 60 00 a6 00 23 21 89 00 0a 00 00 00 00 00
|
||||
01 01 60 00 be 00 af 20 64 00 6e 00 00 00 00 00
|
||||
01 02 60 00 be 03 60 20 80 00 8d 00 00 00 00 00
|
||||
01 01 60 80 fe 73 a4 20 00 00 00 00 ab aa aa 3e
|
||||
01 05 60 80 fe 73 a8 20 00 00 00 00 cd cc cc 3d
|
||||
01 0d 60 00 a6 00 a4 20 6a 00 6a 00 00 00 00 00
|
||||
01 0d 60 00 e6 10 a2 21 00 00 00 00 00 00 08 42
|
||||
01 09 60 80 fe 73 a8 20 00 00 00 00 00 00 80 3f
|
||||
01 01 60 80 be 00 af 20 64 00 6e 00 00 00 00 00
|
||||
01 0d 60 80 fe 73 a4 20 00 00 00 00 60 66 66 3f
|
||||
01 20 80 00 bd 03 40 21 40 00 00 00 00 00 00 00
|
||||
01 20 80 00 fd 73 40 21 00 00 00 00 00 00 80 3f
|
||||
01 01 60 00 e6 10 ef 21 00 00 00 00 00 00 00 00
|
||||
01 20 80 80 bd 03 80 20 40 00 00 00 00 00 00 00
|
||||
01 01 60 00 bd 03 47 20 4f 00 6f 00 00 00 00 00
|
||||
01 09 60 00 fd 52 a7 20 00 00 00 00 7d 7e 7f 00
|
||||
01 05 60 80 be 03 a1 20 80 00 60 00 00 00 00 00
|
||||
01 0d 60 80 be 03 a6 20 a0 00 65 00 00 00 00 00
|
||||
01 02 00 00 28 01 02 26 00 00 00 00 00 00 00 00
|
||||
01 02 00 00 09 01 00 20 02 06 00 00 00 00 00 00
|
||||
01 05 60 00 fe 52 ac 20 00 00 00 00 00 00 00 30
|
||||
01 05 60 80 be 00 a1 20 a0 00 60 00 00 00 00 00
|
||||
01 0d 60 80 be 00 a2 20 a0 00 60 00 00 00 00 00
|
||||
01 09 60 80 be 00 a8 20 a0 00 60 00 00 00 00 00
|
||||
01 09 60 00 e5 52 c6 20 00 00 00 00 00 c0 f7 00
|
||||
01 05 60 00 62 00 47 20 00 00 00 00 00 00 00 00
|
||||
01 09 60 00 22 00 48 20 00 01 60 00 00 00 00 00
|
||||
01 01 60 00 3d 00 af 20 64 00 6e 00 00 00 00 00
|
||||
01 01 60 02 a4 00 01 20 00 01 60 00 00 00 00 00
|
||||
01 01 60 02 bd 03 0f 21 24 60 0e 00 00 00 00 00
|
||||
01 01 61 00 fd 73 0f 21 00 00 00 00 00 00 80 bf
|
||||
@@ -1,37 +0,0 @@
|
||||
mul(16) m3<1>F g10<8,8,1>F g12<8,8,1>F { align1 compr4 };
|
||||
mul(8) g8<1>.xyzF g6<4>.xyzzF g8<4>.wF { align16 };
|
||||
mul(8) g9<1>.wUD g7<4>.wF 0x45000000F /* 2048F */ { align16 };
|
||||
mul(16) g22<1>F g18<8,8,1>F g20<8,8,1>F { align1 compr };
|
||||
mul(8) g8<1>.xD g8<4>.xD g5<0>.xD { align16 };
|
||||
mul(8) g8<1>.xD g8<4>.xD 32D { align16 };
|
||||
mul(16) g22<1>F g16<8,8,1>F 0x41800000F /* 16F */ { align1 compr };
|
||||
mul(16) m3<1>F g6<8,8,1>F 0x3b800000F /* 0.00390625F */ { align1 compr4 };
|
||||
mul(8) m5<1>.xyF g3<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
|
||||
mul(8) g5<1>F g3<4>F 0x37800000F /* 1.52588e-05F */ { align16 };
|
||||
mul.sat(16) m2<1>F g14<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
mul(8) acc0<1>D g1<0>.xD g1<0>.yD { align16 };
|
||||
mul(8) m5<1>F g3<4>F 0x3f000000F /* 0.5F */ { align16 };
|
||||
mul(16) g4<1>D g6<8,8,1>D g2<0,1,0>D { align1 compr };
|
||||
mul.sat(16) g18<1>F g16<8,8,1>F g14<8,8,1>F { align1 compr };
|
||||
mul(8) g4<1>F g4<8,8,1>F g55<8,8,1>F { align1 };
|
||||
mul(8) g26<1>.wUD g29<4>.wF 0x45000000F /* 2048F */ { align16 NoDDChk };
|
||||
mul(8) g2<1>.xyzF g2<4>.wF 0x40404830VF /* [1F, 3F, 2F, 2F]VF */ { align16 };
|
||||
mul(16) g4<1>D g2<0,1,0>UW g2.2<0,1,0>D { align1 compr };
|
||||
mul.sat(8) g6<1>.xyzF g6<4>.xyzzF g7<4>.xF { align16 };
|
||||
mul.sat(8) m5<1>F g6<4>F 0x3b800000F /* 0.00390625F */ { align16 };
|
||||
mul.sat(8) m5<1>.xyzF g3<4>.xyzzF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
|
||||
mul.g.f0.0(16) null<1>F g10<8,8,1>F g12<8,8,1>F { align1 compr };
|
||||
mul.l.f0.0(8) null<1>.xF g1<0>.zF g1<0>.yF { align16 };
|
||||
mul.l.f0.0(16) null<1>F g2.2<0,1,0>F g2.1<0,1,0>F { align1 compr };
|
||||
mul.l.f0.0(16) g14<1>F g10<8,8,1>F g12<8,8,1>F { align1 compr };
|
||||
mul(8) m5<1>.xyF g3<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDChk };
|
||||
mul.nz.f0.0(16) g16<1>F g10<8,8,1>F g12<8,8,1>F { align1 compr };
|
||||
mul.sat(8) m6<1>.xyzF g32<4>.xF g30<4>.xyzzF { align16 NoDDClr };
|
||||
mul.nz.f0.0(16) g6<1>F g4<8,8,1>F 0x3f808000F /* 1.00391F */ { align1 compr };
|
||||
mul.sat(8) m5<1>.xyF g1<0>.wzzzF g3<4>.wzzzF { align16 };
|
||||
mul.sat(8) m5<1>F g4<4>F 0x20303030VF /* [1F, 1F, 1F, 0.5F]VF */ { align16 };
|
||||
mul(8) m5<1>F g3<4>F 0x20305454VF /* [5F, 5F, 1F, 0.5F]VF */ { align16 };
|
||||
mul(8) m6<1>.xyzF g12<4>.xyzzF g13<4>.xF { align16 NoDDClr };
|
||||
mul(8) m5<1>.xyzF g3<4>.xyzzF 0x30302020VF /* [0.5F, 0.5F, 1F, 1F]VF */ { align16 NoDDClr };
|
||||
mul(8) m5<1>.zF g3<4>.zF 0x3f000000F /* 0.5F */ { align16 NoDDClr,NoDDChk };
|
||||
mul(8) m5<1>F g3<4>F g1<0>.xF { align16 };
|
||||
@@ -1,37 +0,0 @@
|
||||
41 20 80 00 be 77 60 30 40 01 8d 00 80 01 8d 00
|
||||
41 01 60 00 bd 77 07 21 c4 00 6a 00 0f 01 6f 00
|
||||
41 01 60 00 a1 7f 28 21 ef 00 6f 00 00 00 00 45
|
||||
41 20 80 00 bd 77 c0 22 40 02 8d 00 80 02 8d 00
|
||||
41 01 60 00 a5 14 01 21 00 01 60 00 a0 00 00 00
|
||||
41 01 60 00 a5 1c 01 21 00 01 60 00 20 00 00 00
|
||||
41 20 80 00 bd 7f c0 22 00 02 8d 00 00 00 80 41
|
||||
41 20 80 00 be 7f 60 30 c0 00 8d 00 00 00 80 3b
|
||||
41 05 60 00 be 7f a3 20 64 00 65 00 00 00 00 3f
|
||||
41 01 60 00 bd 7f af 20 64 00 6e 00 00 00 80 37
|
||||
41 20 80 80 be 77 40 20 c0 01 8d 00 c0 00 8d 00
|
||||
41 01 60 00 a4 14 0f 24 20 00 00 00 25 00 05 00
|
||||
41 01 60 00 be 7f af 20 64 00 6e 00 00 00 00 3f
|
||||
41 20 80 00 a5 14 80 20 c0 00 8d 00 40 00 00 00
|
||||
41 20 80 80 bd 77 40 22 00 02 8d 00 c0 01 8d 00
|
||||
41 00 60 00 bd 77 80 20 80 00 8d 00 e0 06 8d 00
|
||||
41 09 60 00 a1 7f 48 23 af 03 6f 00 00 00 00 45
|
||||
41 01 60 00 bd 5f 47 20 4f 00 6f 00 30 48 40 40
|
||||
41 20 80 00 25 15 80 20 40 00 00 00 48 00 00 00
|
||||
41 01 60 80 bd 77 c7 20 c4 00 6a 00 e0 00 60 00
|
||||
41 01 60 80 be 7f af 20 c4 00 6e 00 00 00 80 3b
|
||||
41 05 60 80 be 7f a7 20 64 00 6a 00 00 00 00 3f
|
||||
41 20 80 03 bc 77 00 20 40 01 8d 00 80 01 8d 00
|
||||
41 01 60 05 bc 77 01 20 2a 00 0a 00 25 00 05 00
|
||||
41 20 80 05 bc 77 00 20 48 00 00 00 44 00 00 00
|
||||
41 20 80 05 bd 77 c0 21 40 01 8d 00 80 01 8d 00
|
||||
41 09 60 00 be 7f a3 20 64 00 65 00 00 00 00 3f
|
||||
41 20 80 02 bd 77 00 22 40 01 8d 00 80 01 8d 00
|
||||
41 05 60 80 be 77 c7 20 00 04 60 00 c4 03 6a 00
|
||||
41 20 80 02 bd 7f c0 20 80 00 8d 00 00 80 80 3f
|
||||
41 01 60 80 be 77 a3 20 2b 00 0a 00 6b 00 6a 00
|
||||
41 01 60 80 be 5f af 20 84 00 6e 00 30 30 30 20
|
||||
41 01 60 00 be 5f af 20 64 00 6e 00 54 54 30 20
|
||||
41 05 60 00 be 77 c7 20 84 01 6a 00 a0 01 60 00
|
||||
41 05 60 00 be 5f a7 20 64 00 6a 00 20 20 30 30
|
||||
41 0d 60 00 be 7f a4 20 6a 00 6a 00 00 00 00 3f
|
||||
41 01 60 00 be 77 af 20 64 00 6e 00 20 00 00 00
|
||||
@@ -1,3 +0,0 @@
|
||||
not(16) g6<1>D -g4<8,8,1>D { align1 compr };
|
||||
not(8) g2<1>D -g2<8,8,1>D { align1 };
|
||||
not(8) g5<1>.xD g5<4>.xD { align16 };
|
||||
@@ -1,3 +0,0 @@
|
||||
04 20 80 00 a5 00 c0 20 80 40 8d 00 00 00 00 00
|
||||
04 00 60 00 a5 00 40 20 40 40 8d 00 00 00 00 00
|
||||
04 01 60 00 a5 00 a1 20 a0 00 60 00 00 00 00 00
|
||||
@@ -1,6 +0,0 @@
|
||||
or(8) g13<1>.xUD g13<4>.xUD g14<4>.xUD { align16 };
|
||||
or(8) g3<1>UD g3<8,8,1>UD g5<8,8,1>UD { align1 };
|
||||
or(16) g12<1>UD g14<8,8,1>UD g20<8,8,1>UD { align1 compr };
|
||||
(+f0.0) or(16) g12<1>UD g12<8,8,1>UD 0x3f800000UD { align1 compr };
|
||||
or(8) m2<1>.wUD g10<4>.xUD g11<4>.xUD { align16 };
|
||||
(+f0.0) or(8) g17<1>.xUD g17<4>.xUD 0x3f800000UD { align16 };
|
||||
@@ -1,6 +0,0 @@
|
||||
06 01 60 00 21 04 a1 21 a0 01 60 00 c0 01 60 00
|
||||
06 00 60 00 21 04 60 20 60 00 8d 00 a0 00 8d 00
|
||||
06 20 80 00 21 04 80 21 c0 01 8d 00 80 02 8d 00
|
||||
06 20 81 00 21 0c 80 21 80 01 8d 00 00 00 80 3f
|
||||
06 01 60 00 22 04 48 20 40 01 60 00 60 01 60 00
|
||||
06 01 61 00 21 0c 21 22 20 02 60 00 00 00 80 3f
|
||||
@@ -1,3 +0,0 @@
|
||||
pln(16) g10<1>F g3.4<0,1,0>F g6<8,8,1>F { align1 compr };
|
||||
pln(8) g37<1>F g4.4<0,1,0>F g38<8,8,1>F { align1 };
|
||||
pln(16) m4<1>F g5.4<0,1,0>F g6<8,8,1>F { align1 compr4 };
|
||||
@@ -1,3 +0,0 @@
|
||||
5a 20 80 00 bd 77 40 21 70 00 00 00 c0 00 8d 00
|
||||
5a 00 60 00 bd 77 a0 24 90 00 00 00 c0 04 8d 00
|
||||
5a 20 80 00 be 77 80 30 b0 00 00 00 c0 00 8d 00
|
||||
@@ -1,4 +0,0 @@
|
||||
rndd(16) g16<1>F g24<8,8,1>F { align1 compr };
|
||||
rndd(8) g6<1>.xF g1<0>.xF { align16 };
|
||||
rndd(8) g6<1>.xF (abs)g1<0>.xF { align16 NoDDClr };
|
||||
rndd(8) g6<1>.yF g7<4>.xF { align16 NoDDClr,NoDDChk };
|
||||
@@ -1,4 +0,0 @@
|
||||
45 20 80 00 bd 03 00 22 00 03 8d 00 00 00 00 00
|
||||
45 01 60 00 bd 03 c1 20 20 00 00 00 00 00 00 00
|
||||
45 05 60 00 bd 03 c1 20 20 20 00 00 00 00 00 00
|
||||
45 0d 60 00 bd 03 c2 20 e0 00 60 00 00 00 00 00
|
||||
@@ -1,31 +0,0 @@
|
||||
(+f0.0.any4h) sel(8) g7<1>UD g9<4>UD g8<4>UD { align16 };
|
||||
(+f0.0) sel(8) g10<1>.xyUD g7<4>.xyyyUD g3<0>.zwwwUD { align16 };
|
||||
(+f0.0.all4h) sel(8) g6<1>UD g6<4>UD g7<4>UD { align16 };
|
||||
(+f0.0) sel(16) g6<1>UD g40<8,8,1>UD g46<8,8,1>UD { align1 compr };
|
||||
(+f0.0) sel(16) m3<1>UD g30<8,8,1>UD 0x3f800000UD { align1 compr4 };
|
||||
(+f0.0) sel(16) g10<1>F g6<8,8,1>F 0x0F /* 0F */ { align1 compr };
|
||||
(-f0.0) sel(16) g4<1>UD g6<8,8,1>UD 0x00000000UD { align1 compr };
|
||||
(+f0.0.x) sel(8) g6<1>.xUD g6<4>.yUD 0x41a80000UD { align16 };
|
||||
(-f0.0.x) sel(8) g6<1>.xUD g6<4>.xUD 0x41b80000UD { align16 };
|
||||
(+f0.0) sel(16) g4<1>F (abs)g16<8,8,1>F (abs)g8<8,8,1>F { align1 compr };
|
||||
(+f0.0) sel(16) m3<1>UD g18<8,8,1>UD g24<8,8,1>UD { align1 compr4 };
|
||||
(+f0.0.x) sel(8) g10<1>.xUD g9<4>.yUD g9<4>.xUD { align16 };
|
||||
(+f0.0) sel(16) g28<1>UD g8<0,1,0>UD 0x00000000UD { align1 compr };
|
||||
(+f0.0) sel(8) g28<1>.yF g32<4>.xF 0x0F /* 0F */ { align16 };
|
||||
(-f0.0.z) sel(8) g28<1>.zUD g31<4>.xUD 0x00000000UD { align16 };
|
||||
(+f0.0) sel.sat(8) m5<1>F g1<0>F g3<4>F { align16 };
|
||||
(-f0.0) sel(16) g8<1>F (abs)g6<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
(-f0.0) sel(16) m3<1>UD g14<8,8,1>UD 0x3f00022fUD { align1 compr4 };
|
||||
(+f0.0) sel(16) m4<1>F g4<8,8,1>F g6<8,8,1>F { align1 compr4 };
|
||||
(-f0.0.y) sel(8) g3<1>.yUD g4<4>.xUD 0x00000000UD { align16 };
|
||||
(+f0.0) sel(8) g5<1>UD g3<4>UD 0x00000000UD { align16 };
|
||||
(+f0.0.y) sel(8) g3<1>.yUD g1<0>.wUD g1<0>.zUD { align16 };
|
||||
(+f0.0) sel(8) g5<1>.xyF g1<0>.xyyyF g1<0>.zF { align16 };
|
||||
(+f0.0.x) sel(8) g5<1>.xF g1<0>.xF -g1<0>.xF { align16 };
|
||||
(-f0.0) sel(8) g5<1>.wUD g5<4>.wUD 0x3f800000UD { align16 };
|
||||
(-f0.0) sel(8) g4<1>.xyzF (abs)g4<4>.xyzzF 0x3f800000F /* 1F */ { align16 };
|
||||
(+f0.0.x) sel(8) g4<1>.xD -g4<4>.xD 0D { align16 };
|
||||
(+f0.0) sel(16) g4<1>D -g6<8,8,1>D -1D { align1 compr };
|
||||
(-f0.0.x) sel(8) g3<1>.xF (abs)g3<4>.xF 0x3f800000F /* 1F */ { align16 };
|
||||
(+f0.0) sel(16) m3<1>F g4<8,8,1>F 0x3f800000F /* 1F */ { align1 compr4 };
|
||||
(+f0.0) sel.sat(8) m5<1>F g6<4>F 0xbf800000F /* -1F */ { align16 };
|
||||
@@ -1,31 +0,0 @@
|
||||
02 01 66 00 21 04 ef 20 24 01 6e 00 04 01 6e 00
|
||||
02 01 61 00 21 04 43 21 e4 00 65 00 6e 00 0f 00
|
||||
02 01 67 00 21 04 cf 20 c4 00 6e 00 e4 00 6e 00
|
||||
02 20 81 00 21 04 c0 20 00 05 8d 00 c0 05 8d 00
|
||||
02 20 81 00 22 0c 60 30 c0 03 8d 00 00 00 80 3f
|
||||
02 20 81 00 bd 7f 40 21 c0 00 8d 00 00 00 00 00
|
||||
02 20 91 00 21 0c 80 20 c0 00 8d 00 00 00 00 00
|
||||
02 01 62 00 21 0c c1 20 c5 00 65 00 00 00 a8 41
|
||||
02 01 72 00 21 0c c1 20 c0 00 60 00 00 00 b8 41
|
||||
02 20 81 00 bd 77 80 20 00 22 8d 00 00 21 8d 00
|
||||
02 20 81 00 22 04 60 30 40 02 8d 00 00 03 8d 00
|
||||
02 01 62 00 21 04 41 21 25 01 65 00 20 01 60 00
|
||||
02 20 81 00 21 0c 80 23 00 01 00 00 00 00 00 00
|
||||
02 01 61 00 bd 7f 82 23 00 04 60 00 00 00 00 00
|
||||
02 01 74 00 21 0c 84 23 e0 03 60 00 00 00 00 00
|
||||
02 01 61 80 be 77 af 20 24 00 0e 00 64 00 6e 00
|
||||
02 20 91 00 bd 7f 00 21 c0 20 8d 00 00 00 80 3f
|
||||
02 20 91 00 22 0c 60 30 c0 01 8d 00 2f 02 00 3f
|
||||
02 20 81 00 be 77 80 30 80 00 8d 00 c0 00 8d 00
|
||||
02 01 73 00 21 0c 62 20 80 00 60 00 00 00 00 00
|
||||
02 01 61 00 21 0c af 20 64 00 6e 00 00 00 00 00
|
||||
02 01 63 00 21 04 62 20 2f 00 0f 00 2a 00 0a 00
|
||||
02 01 61 00 bd 77 a3 20 24 00 05 00 2a 00 0a 00
|
||||
02 01 62 00 bd 77 a1 20 20 00 00 00 20 40 00 00
|
||||
02 01 71 00 21 0c a8 20 af 00 6f 00 00 00 80 3f
|
||||
02 01 71 00 bd 7f 87 20 84 20 6a 00 00 00 80 3f
|
||||
02 01 62 00 a5 1c 81 20 80 40 60 00 00 00 00 00
|
||||
02 20 81 00 a5 1c 80 20 c0 40 8d 00 ff ff ff ff
|
||||
02 01 72 00 bd 7f 61 20 60 20 60 00 00 00 80 3f
|
||||
02 20 81 00 be 7f 60 30 80 00 8d 00 00 00 80 3f
|
||||
02 01 61 80 be 7f af 20 c4 00 6e 00 00 00 80 bf
|
||||
@@ -1,222 +0,0 @@
|
||||
send(16) 2 g12<1>F g10<8,8,1>F 0x01110001
|
||||
math MsgDesc: inv mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04800
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 10 rlen 0 { align1 EOT };
|
||||
send(8) 1 g8<1>.wF g6<4>.wF 0x01110001
|
||||
math MsgDesc: inv mlen 1 rlen 1 { align16 };
|
||||
send(8) 1 null<1>F g0<4>F 0x8650c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 5 rlen 0 { align16 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x8640c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 4 rlen 0 { align16 EOT };
|
||||
send(8) 13 g0<1>F g0<4>F 0x053190ff
|
||||
write MsgDesc: OWord dual block write MsgCtrl = 0x0 Surface = 255 mlen 3 rlen 1 { align16 };
|
||||
send(8) 14 g9<1>F g0<4>F 0x042150ff
|
||||
read MsgDesc: OWord Dual Block Read MsgCtrl = 0x0 Surface = 255 mlen 2 rlen 1 { align16 };
|
||||
send(8) 1 null<1>F g0<4>F 0x8680c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 8 rlen 0 { align16 EOT };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02780001
|
||||
sampler MsgDesc: (1, 0, 0, ) mlen 7 rlen 8 { align1 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02580001
|
||||
sampler MsgDesc: (1, 0, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(8) 14 g3<1>UD g0<4>F 0x04211000
|
||||
read MsgDesc: OWord Dual Block Read MsgCtrl = 0x0 Surface = 0 mlen 2 rlen 1 { align16 };
|
||||
send(8) 1 g6<1>.xF g6<4>.xF 0x01110004
|
||||
math MsgDesc: sqrt mlen 1 rlen 1 { align16 };
|
||||
send(16) 1 g26<1>UW g0<8,8,1>UW 0x02382001
|
||||
sampler MsgDesc: (1, 0, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02983001
|
||||
sampler MsgDesc: (1, 0, 3, ) mlen 9 rlen 8 { align1 };
|
||||
send(8) 1 null<1>F g0<4>F 0x06d04400
|
||||
urb MsgDesc: 0 urb_write interleave used mlen 13 rlen 0 { align16 };
|
||||
send(8) 1 null<1>F g0<4>F 0x8650c460
|
||||
urb MsgDesc: 6 urb_write interleave used complete mlen 5 rlen 0 { align16 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x8660c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 6 rlen 0 { align16 EOT };
|
||||
send(8) 2 g6<1>F g4<8,8,1>F 0x0121000a
|
||||
math MsgDesc: pow mlen 2 rlen 1 { align1 };
|
||||
send(16) 1 g16<1>UW g0<8,8,1>UW 0x02380001
|
||||
sampler MsgDesc: (1, 0, 0, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 2 g6<1>F g4<8,8,1>F 0x01110007
|
||||
math MsgDesc: cos mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 13 g8<1>UW g0<8,8,1>F 0x02383001
|
||||
sampler MsgDesc: (1, 0, 3, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 2 g4<1>F g2.4<0,1,0>F 0x01110081
|
||||
math MsgDesc: inv scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02980001
|
||||
sampler MsgDesc: (1, 0, 0, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85e04800
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 14 rlen 0 { align1 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x8670c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 7 rlen 0 { align16 EOT };
|
||||
send(8) 1 null<1>UW g0<8,8,1>UW 0x85604c00
|
||||
write MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 6 rlen 0 { align1 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x8680c460
|
||||
urb MsgDesc: 6 urb_write interleave used complete mlen 8 rlen 0 { align16 EOT };
|
||||
send(8) 1 g5<1>.yF g6<4>.xF 0x01110006
|
||||
math MsgDesc: sin mlen 1 rlen 1 { align16 };
|
||||
send(8) 1 g7<1>.xD g1<0>.zD 0x0121001c
|
||||
math MsgDesc: intdiv signed mlen 2 rlen 1 { align16 };
|
||||
send(8) 1 null<1>F g0<4>F 0x8640c460
|
||||
urb MsgDesc: 6 urb_write interleave used complete mlen 4 rlen 0 { align16 EOT };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85c04800
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 12 rlen 0 { align1 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x86b0c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 11 rlen 0 { align16 EOT };
|
||||
send(16) 2 g6<1>F g4<8,8,1>F 0x01110003
|
||||
math MsgDesc: exp mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02983005
|
||||
sampler MsgDesc: (5, 0, 3, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 g12<1>UW g0<8,8,1>UW 0x02983006
|
||||
sampler MsgDesc: (6, 0, 3, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 g20<1>UW g0<8,8,1>UW 0x02983007
|
||||
sampler MsgDesc: (7, 0, 3, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 g28<1>UW g0<8,8,1>UW 0x02983008
|
||||
sampler MsgDesc: (8, 0, 3, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04000
|
||||
write MsgDesc: RT write SIMD16 Surface = 0 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04001
|
||||
write MsgDesc: RT write SIMD16 Surface = 1 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04002
|
||||
write MsgDesc: RT write SIMD16 Surface = 2 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04803
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 3 mlen 10 rlen 0 { align1 EOT };
|
||||
send(8) 2 g4<1>D g2.4<0,1,0>D 0x0121009c
|
||||
math MsgDesc: intdiv signed scalar mlen 2 rlen 1 { align1 };
|
||||
send(16) 14 g8<1>UW null<8,8,1>F 0x04120301
|
||||
read MsgDesc: OWord Block Read MsgCtrl = 0x3 Surface = 1 mlen 1 rlen 2 { align1 nomask };
|
||||
send(8) 1 g30<1>.xF (abs)g30<4>.xF 0x01110005
|
||||
math MsgDesc: rsq mlen 1 rlen 1 { align16 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02981001
|
||||
sampler MsgDesc: (1, 0, 1, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 2 g4<1>F g2<0,1,0>F 0x01110086
|
||||
math MsgDesc: sin scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 2 g6<1>F g2<0,1,0>F 0x01110087
|
||||
math MsgDesc: cos scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 2 g4<1>F g2.1<0,1,0>F 0x01110085
|
||||
math MsgDesc: rsq scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85f04800
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 15 rlen 0 { align1 EOT };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02982001
|
||||
sampler MsgDesc: (1, 0, 2, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02580304
|
||||
sampler MsgDesc: (4, 3, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(8) 1 g5<1>.xF g1<0>.xF 0x01110002
|
||||
math MsgDesc: log mlen 1 rlen 1 { align16 };
|
||||
send(8) 1 g6<1>UW g0<8,8,1>UW 0x02640001
|
||||
sampler MsgDesc: (1, 0, 0, ) mlen 6 rlen 4 { align1 };
|
||||
send(8) 1 g10<1>UW g0<8,8,1>UW 0x02641001
|
||||
sampler MsgDesc: (1, 0, 1, ) mlen 6 rlen 4 { align1 };
|
||||
send(8) 2 g4<1>F g2<0,1,0>F 0x012100ca
|
||||
math MsgDesc: pow sat scalar mlen 2 rlen 1 { align1 };
|
||||
send(16) 1 g16<1>UW g0<8,8,1>UW 0x02982102
|
||||
sampler MsgDesc: (2, 1, 2, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04801
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 1 mlen 10 rlen 0 { align1 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x8690c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 9 rlen 0 { align16 EOT };
|
||||
send(8) 1 null<1>F g0<4>F 0x86c0c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 12 rlen 0 { align16 EOT };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04802
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 2 mlen 10 rlen 0 { align1 EOT };
|
||||
send(16) 1 g20<1>UW g0<8,8,1>UW 0x02580102
|
||||
sampler MsgDesc: (2, 1, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(8) 1 null<1>F g0<4>F 0x86a0c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 10 rlen 0 { align16 EOT };
|
||||
send(16) 2 g4<1>F g2<0,1,0>F 0x01110082
|
||||
math MsgDesc: log scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 1 g14<1>UW g0<8,8,1>UW 0x02382102
|
||||
sampler MsgDesc: (2, 1, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g26<1>UW g0<8,8,1>UW 0x02382203
|
||||
sampler MsgDesc: (3, 2, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g26<1>UW g0<8,8,1>UW 0x02580203
|
||||
sampler MsgDesc: (3, 2, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(16) 1 g34<1>UW g0<8,8,1>UW 0x02382304
|
||||
sampler MsgDesc: (4, 3, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g42<1>UW g0<8,8,1>UW 0x02382405
|
||||
sampler MsgDesc: (5, 4, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g42<1>UW g0<8,8,1>UW 0x02580405
|
||||
sampler MsgDesc: (5, 4, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(16) 1 g50<1>UW g0<8,8,1>UW 0x02382506
|
||||
sampler MsgDesc: (6, 5, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g50<1>UW g0<8,8,1>UW 0x02580506
|
||||
sampler MsgDesc: (6, 5, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(16) 1 g58<1>UW g0<8,8,1>UW 0x02382607
|
||||
sampler MsgDesc: (7, 6, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g58<1>UW g0<8,8,1>UW 0x02580607
|
||||
sampler MsgDesc: (7, 6, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(16) 1 g66<1>UW g0<8,8,1>UW 0x02382708
|
||||
sampler MsgDesc: (8, 7, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g66<1>UW g0<8,8,1>UW 0x02580708
|
||||
sampler MsgDesc: (8, 7, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(8) 1 null<1>F g0<4>F 0x86d0c400
|
||||
urb MsgDesc: 0 urb_write interleave used complete mlen 13 rlen 0 { align16 EOT };
|
||||
send(8) 1 g10<1>UW g0<8,8,1>UW 0x02641102
|
||||
sampler MsgDesc: (2, 1, 1, ) mlen 6 rlen 4 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85b04800
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 11 rlen 0 { align1 EOT };
|
||||
send(8) 2 g3<1>F g0<4>F 0x02211505
|
||||
sampler MsgDesc: (5, 5, 1, ) mlen 2 rlen 1 { align16 };
|
||||
send(16) 2 g4<1>F g2<0,1,0>F 0x011100c4
|
||||
math MsgDesc: sqrt sat scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(16) 2 g4<1>F g2<0,1,0>F 0x011100c3
|
||||
math MsgDesc: exp sat scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(8) 2 g3<1>F g0<4>F 0x02211000
|
||||
sampler MsgDesc: (0, 0, 1, ) mlen 2 rlen 1 { align16 };
|
||||
send(16) 13 g24<1>UW g0<8,8,1>F 0x02383002
|
||||
sampler MsgDesc: (2, 0, 3, ) mlen 3 rlen 8 { align1 };
|
||||
send(8) 1 g3<1>F g1<0>F 0x01110044
|
||||
math MsgDesc: sqrt sat mlen 1 rlen 1 { align16 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02983002
|
||||
sampler MsgDesc: (2, 0, 3, ) mlen 9 rlen 8 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04003
|
||||
write MsgDesc: RT write SIMD16 Surface = 3 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04804
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 4 mlen 10 rlen 0 { align1 EOT };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04004
|
||||
write MsgDesc: RT write SIMD16 Surface = 4 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04805
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 5 mlen 10 rlen 0 { align1 EOT };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04005
|
||||
write MsgDesc: RT write SIMD16 Surface = 5 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04806
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 6 mlen 10 rlen 0 { align1 EOT };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x05a04006
|
||||
write MsgDesc: RT write SIMD16 Surface = 6 mlen 10 rlen 0 { align1 };
|
||||
send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04807
|
||||
write MsgDesc: RT write SIMD16 LastRT Surface = 7 mlen 10 rlen 0 { align1 EOT };
|
||||
send(8) 1 g8<1>UW g0<8,8,1>UW 0x02742001
|
||||
sampler MsgDesc: (1, 0, 2, ) mlen 7 rlen 4 { align1 };
|
||||
send(16) 1 g12<1>UW g0<8,8,1>UW 0x02780102
|
||||
sampler MsgDesc: (2, 1, 0, ) mlen 7 rlen 8 { align1 };
|
||||
send(8) 1 null<1>F g0<4>F 0x8620c460
|
||||
urb MsgDesc: 6 urb_write interleave used complete mlen 2 rlen 0 { align16 EOT };
|
||||
send(16) 2 g6<1>F g2<0,1,0>F 0x01110084
|
||||
math MsgDesc: sqrt scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(8) 1 g3<1>F g1<0>F 0x01110043
|
||||
math MsgDesc: exp sat mlen 1 rlen 1 { align16 };
|
||||
send(8) 2 g4<1>F g2<0,1,0>F 0x0121008a
|
||||
math MsgDesc: pow scalar mlen 2 rlen 1 { align1 };
|
||||
send(8) 1 g8<1>UW g0<8,8,1>UW 0x02640102
|
||||
sampler MsgDesc: (2, 1, 0, ) mlen 6 rlen 4 { align1 };
|
||||
send(16) 2 g4<1>F g2<0,1,0>F 0x01110083
|
||||
math MsgDesc: exp scalar mlen 1 rlen 1 { align1 compr };
|
||||
send(8) 1 g8<1>UW g0<8,8,1>UW 0x02a42001
|
||||
sampler MsgDesc: (1, 0, 2, ) mlen 10 rlen 4 { align1 };
|
||||
send(16) 1 g14<1>UW g0<8,8,1>UW 0x02580003
|
||||
sampler MsgDesc: (3, 0, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(16) 1 g22<1>UW g0<8,8,1>UW 0x02580004
|
||||
sampler MsgDesc: (4, 0, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02580f10
|
||||
sampler MsgDesc: (16, 15, 0, ) mlen 5 rlen 8 { align1 };
|
||||
send(8) 2 g3<1>F g0<4>F 0x02211303
|
||||
sampler MsgDesc: (3, 3, 1, ) mlen 2 rlen 1 { align16 };
|
||||
send(8) 1 g3<1>F g1<0>F 0x0121004a
|
||||
math MsgDesc: pow sat mlen 2 rlen 1 { align16 };
|
||||
send(16) 1 g10<1>UW g0<8,8,1>UW 0x02382004
|
||||
sampler MsgDesc: (4, 0, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g10<1>UW g0<8,8,1>UW 0x02382003
|
||||
sampler MsgDesc: (3, 0, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g10<1>UW g0<8,8,1>UW 0x02382002
|
||||
sampler MsgDesc: (2, 0, 2, ) mlen 3 rlen 8 { align1 };
|
||||
send(16) 1 g4<1>UW g0<8,8,1>UW 0x02580002
|
||||
sampler MsgDesc: (2, 0, 0, ) mlen 5 rlen 8 { align1 };
|
||||
@@ -1,111 +0,0 @@
|
||||
31 20 80 02 bd 0f 80 21 40 01 8d 00 01 00 11 01
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 00 48 a0 85
|
||||
31 01 60 01 bd 0f 08 21 cf 00 6f 00 01 00 11 01
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 50 86
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 40 86
|
||||
31 01 60 0d bd 0f 0f 20 04 00 6e 00 ff 90 31 05
|
||||
31 01 60 0e bd 0f 2f 21 04 00 6e 00 ff 50 21 04
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 80 86
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 01 00 78 02
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 01 00 58 02
|
||||
31 01 60 0e a1 0f 6f 20 04 00 6e 00 00 10 21 04
|
||||
31 01 60 01 bd 0f c1 20 c0 00 60 00 04 00 11 01
|
||||
31 00 80 01 29 0d 40 23 00 00 8d 00 01 20 38 02
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 01 30 98 02
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 44 d0 06
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 60 c4 50 86
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 60 86
|
||||
31 00 60 02 bd 0f c0 20 80 00 8d 00 0a 00 21 01
|
||||
31 00 80 01 29 0d 00 22 00 00 8d 00 01 00 38 02
|
||||
31 20 80 02 bd 0f c0 20 80 00 8d 00 07 00 11 01
|
||||
31 00 80 0d a9 0f 00 21 00 00 8d 00 01 30 38 02
|
||||
31 20 80 02 bd 0f 80 20 50 00 00 00 81 00 11 01
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 01 00 98 02
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 00 48 e0 85
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 70 86
|
||||
31 00 60 01 28 0d 00 20 00 00 8d 00 00 4c 60 85
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 60 c4 80 86
|
||||
31 01 60 01 bd 0f a2 20 c0 00 60 00 06 00 11 01
|
||||
31 01 60 01 a5 0c e1 20 2a 00 0a 00 1c 00 21 01
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 60 c4 40 86
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 00 48 c0 85
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 b0 86
|
||||
31 20 80 02 bd 0f c0 20 80 00 8d 00 03 00 11 01
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 05 30 98 02
|
||||
31 00 80 01 29 0d 80 21 00 00 8d 00 06 30 98 02
|
||||
31 00 80 01 29 0d 80 22 00 00 8d 00 07 30 98 02
|
||||
31 00 80 01 29 0d 80 23 00 00 8d 00 08 30 98 02
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 00 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 01 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 02 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 03 48 a0 85
|
||||
31 00 60 02 a5 0c 80 20 50 00 00 00 9c 00 21 01
|
||||
31 02 80 0e 89 0f 00 21 00 00 8d 00 01 03 12 04
|
||||
31 01 60 01 bd 0f c1 23 c0 23 60 00 05 00 11 01
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 01 10 98 02
|
||||
31 20 80 02 bd 0f 80 20 40 00 00 00 86 00 11 01
|
||||
31 20 80 02 bd 0f c0 20 40 00 00 00 87 00 11 01
|
||||
31 20 80 02 bd 0f 80 20 44 00 00 00 85 00 11 01
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 00 48 f0 85
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 01 20 98 02
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 04 03 58 02
|
||||
31 01 60 01 bd 0f a1 20 20 00 00 00 02 00 11 01
|
||||
31 00 60 01 29 0d c0 20 00 00 8d 00 01 00 64 02
|
||||
31 00 60 01 29 0d 40 21 00 00 8d 00 01 10 64 02
|
||||
31 00 60 02 bd 0f 80 20 40 00 00 00 ca 00 21 01
|
||||
31 00 80 01 29 0d 00 22 00 00 8d 00 02 21 98 02
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 01 48 a0 85
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 90 86
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 c0 86
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 02 48 a0 85
|
||||
31 00 80 01 29 0d 80 22 00 00 8d 00 02 01 58 02
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 a0 86
|
||||
31 20 80 02 bd 0f 80 20 40 00 00 00 82 00 11 01
|
||||
31 00 80 01 29 0d c0 21 00 00 8d 00 02 21 38 02
|
||||
31 00 80 01 29 0d 40 23 00 00 8d 00 03 22 38 02
|
||||
31 00 80 01 29 0d 40 23 00 00 8d 00 03 02 58 02
|
||||
31 00 80 01 29 0d 40 24 00 00 8d 00 04 23 38 02
|
||||
31 00 80 01 29 0d 40 25 00 00 8d 00 05 24 38 02
|
||||
31 00 80 01 29 0d 40 25 00 00 8d 00 05 04 58 02
|
||||
31 00 80 01 29 0d 40 26 00 00 8d 00 06 25 38 02
|
||||
31 00 80 01 29 0d 40 26 00 00 8d 00 06 05 58 02
|
||||
31 00 80 01 29 0d 40 27 00 00 8d 00 07 26 38 02
|
||||
31 00 80 01 29 0d 40 27 00 00 8d 00 07 06 58 02
|
||||
31 00 80 01 29 0d 40 28 00 00 8d 00 08 27 38 02
|
||||
31 00 80 01 29 0d 40 28 00 00 8d 00 08 07 58 02
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 00 c4 d0 86
|
||||
31 00 60 01 29 0d 40 21 00 00 8d 00 02 11 64 02
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 00 48 b0 85
|
||||
31 01 60 02 bd 0f 6f 20 04 00 6e 00 05 15 21 02
|
||||
31 20 80 02 bd 0f 80 20 40 00 00 00 c4 00 11 01
|
||||
31 20 80 02 bd 0f 80 20 40 00 00 00 c3 00 11 01
|
||||
31 01 60 02 bd 0f 6f 20 04 00 6e 00 00 10 21 02
|
||||
31 00 80 0d a9 0f 00 23 00 00 8d 00 02 30 38 02
|
||||
31 01 60 01 bd 0f 6f 20 24 00 0e 00 44 00 11 01
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 02 30 98 02
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 03 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 04 48 a0 85
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 04 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 05 48 a0 85
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 05 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 06 48 a0 85
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 06 40 a0 05
|
||||
31 00 80 01 28 0d 00 20 00 00 8d 00 07 48 a0 85
|
||||
31 00 60 01 29 0d 00 21 00 00 8d 00 01 20 74 02
|
||||
31 00 80 01 29 0d 80 21 00 00 8d 00 02 01 78 02
|
||||
31 01 60 01 bc 0f 0f 20 04 00 6e 00 60 c4 20 86
|
||||
31 20 80 02 bd 0f c0 20 40 00 00 00 84 00 11 01
|
||||
31 01 60 01 bd 0f 6f 20 24 00 0e 00 43 00 11 01
|
||||
31 00 60 02 bd 0f 80 20 40 00 00 00 8a 00 21 01
|
||||
31 00 60 01 29 0d 00 21 00 00 8d 00 02 01 64 02
|
||||
31 20 80 02 bd 0f 80 20 40 00 00 00 83 00 11 01
|
||||
31 00 60 01 29 0d 00 21 00 00 8d 00 01 20 a4 02
|
||||
31 00 80 01 29 0d c0 21 00 00 8d 00 03 00 58 02
|
||||
31 00 80 01 29 0d c0 22 00 00 8d 00 04 00 58 02
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 10 0f 58 02
|
||||
31 01 60 02 bd 0f 6f 20 04 00 6e 00 03 13 21 02
|
||||
31 01 60 01 bd 0f 6f 20 24 00 0e 00 4a 00 21 01
|
||||
31 00 80 01 29 0d 40 21 00 00 8d 00 04 20 38 02
|
||||
31 00 80 01 29 0d 40 21 00 00 8d 00 03 20 38 02
|
||||
31 00 80 01 29 0d 40 21 00 00 8d 00 02 20 38 02
|
||||
31 00 80 01 29 0d 80 20 00 00 8d 00 02 00 58 02
|
||||
@@ -1,5 +0,0 @@
|
||||
shl(8) g4<1>.xD g1<0>.yD 0x00000004UD { align16 };
|
||||
shl(16) g4<1>D g2.4<0,1,0>D 0x00000004UD { align1 compr };
|
||||
shl(16) m14<1>D g2<0,1,0>D 0x00000004UD { align1 compr };
|
||||
shl(8) g11<1>.xUD g11<4>.xUD 4D { align16 };
|
||||
shl(8) g5<1>D g3<4>D g4<4>UD { align16 };
|
||||
@@ -1,5 +0,0 @@
|
||||
09 01 60 00 a5 0c 81 20 25 00 05 00 04 00 00 00
|
||||
09 20 80 00 a5 0c 80 20 50 00 00 00 04 00 00 00
|
||||
09 20 80 00 a6 0c c0 21 40 00 00 00 04 00 00 00
|
||||
09 01 60 00 21 1c 61 21 60 01 60 00 04 00 00 00
|
||||
09 01 60 00 a5 04 af 20 64 00 6e 00 84 00 6e 00
|
||||
@@ -1 +0,0 @@
|
||||
shr(1) g10.4<1>UD g10.4<0,1,0>UD 0x00000004UD { align1 nomask };
|
||||
@@ -1 +0,0 @@
|
||||
08 02 00 00 21 0c 50 21 50 01 00 00 04 00 00 00
|
||||
@@ -1,4 +0,0 @@
|
||||
while(16) Jump: -10 { align1 };
|
||||
while(8) Jump: -16 { align16 };
|
||||
(-f0.0) while(16) Jump: -11 { align1 };
|
||||
(-f0.0.x) while(8) Jump: -11 { align16 };
|
||||
@@ -1,4 +0,0 @@
|
||||
27 00 80 00 00 1c 00 34 00 14 60 00 f6 ff 00 00
|
||||
27 01 60 00 00 1c 0f 34 04 14 6e 00 f0 ff 00 00
|
||||
27 00 91 00 00 1c 00 34 00 14 60 00 f5 ff 00 00
|
||||
27 01 72 00 00 1c 0f 34 04 14 6e 00 f5 ff 00 00
|
||||
@@ -1,2 +0,0 @@
|
||||
xor(16) g4<1>UD g2<0,1,0>UD g2.1<0,1,0>UD { align1 compr };
|
||||
xor(8) g5<1>.xUD g1<0>.xUD g1<0>.yUD { align16 };
|
||||
@@ -1,2 +0,0 @@
|
||||
07 20 80 00 21 04 80 20 40 00 00 00 44 00 00 00
|
||||
07 01 60 00 21 04 a1 20 20 00 00 00 25 00 05 00
|
||||
@@ -1,48 +0,0 @@
|
||||
add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
|
||||
add(16) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 compr };
|
||||
add(16) g4<1>F g18<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
add(1) m14.4<1>D g8.4<0,1,0>D 16D { align1 nomask };
|
||||
add(8) g5<1>.xD g2<4>.xD 64D { align16 };
|
||||
add(8) g4<1>.xD g5<4>.xD g4<4>.xD { align16 };
|
||||
add(8) g3<1>F g3<4>F g5<4>F { align16 };
|
||||
add(16) g24<1>F g20<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
add(16) g14<1>D g14<8,8,1>D 1D { align1 compr };
|
||||
add(8) m5<1>.xyzF g10<4>.xyzzF g8<4>.xyzzF { align16 NoDDClr };
|
||||
add.le.f0.0(16) g6<1>F g8<8,8,1>F g4<8,8,1>F { align1 compr };
|
||||
add(8) a0<1>UW g4<16,8,2>UW 0x0040UW { align1 };
|
||||
add(8) a0<1>UW g5<16,8,2>UW 0x0040UW { align1 sechalf };
|
||||
add(8) g3<1>.xyF g2<4>.xyyyF 0x3f800000F /* 1F */ { align16 };
|
||||
add(16) m2<1>D g6<8,8,1>D g8.3<0,1,0>D { align1 compr };
|
||||
add(16) m14<1>D g4<8,8,1>D 12D { align1 compr };
|
||||
add.sat(16) g6<1>F g4<8,8,1>F g2.1<0,1,0>F { align1 compr };
|
||||
add(8) g37<1>UW g1.4<2,4,0>UW 0x10101010V { align1 };
|
||||
add(8) g37<1>F g37<8,8,1>UW -g1<0,1,0>F { align1 };
|
||||
add(8) g37<1>D g2<0,1,0>D 1D { align1 };
|
||||
add(8) m5<1>.xF g3<4>.xF 0x3f000000F /* 0.5F */ { align16 };
|
||||
add(16) g4<1>D g2<0,1,0>D -g2.2<0,1,0>D { align1 compr };
|
||||
add.sat(8) m5<1>F g7<4>F g8<4>F { align16 };
|
||||
add(8) g31<1>.xyzF g28<4>.xyzzF 0x30300000VF /* [0F, 0F, 1F, 1F]VF */ { align16 };
|
||||
add.sat(8) m5<1>.xyzF g25<4>.xyzzF g26<4>.xyzzF { align16 NoDDClr };
|
||||
add.ge.f0.0(8) g8<1>.xF -g8<4>.xF 0x3f800000F /* 1F */ { align16 };
|
||||
add(16) g4.1<2>UW g4.1<16,8,2>UW g6<16,8,2>UW { align1 compr };
|
||||
add.ge.f0.0(16) g4<1>F -g6<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
add(8) g4<1>.xyF g4<4>.xyyyF 0xbf800000F /* -1F */ { align16 NoDDClr };
|
||||
add(8) m5<1>.xyzF g4<4>.xyzzF g2<0>.xyzzF { align16 };
|
||||
add(16) m2<1>F -g16<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
add(8) m5<1>.zwF g8<4>.xxxyF g9<4>.xxxyF { align16 NoDDChk };
|
||||
add(8) g4<1>.xUD g4<4>.xUD 0x00000040UD { align16 };
|
||||
add.sat(8) m5<1>.yF g1<0>.zF 0x3f000000F /* 0.5F */ { align16 };
|
||||
add(16) m2<1>F g22<8,8,1>F g2<0,1,0>F { align1 compr };
|
||||
add(16) m14<1>UD g4<8,8,1>UD 0x00000110UD { align1 compr };
|
||||
add(8) g5<1>F -g9<4>.xyxyF g9<4>.zwzwF { align16 sechalf };
|
||||
add.sat(8) m5<1>.yF g6<4>.xF g7<4>.xF { align16 NoDDClr,NoDDChk };
|
||||
add.sat(8) m5<1>.wF g6<4>.xF g7<4>.xF { align16 NoDDChk };
|
||||
add.ge.f0.0(16) g16<1>F g18<8,8,1>F g10<8,8,1>F { align1 compr };
|
||||
add.sat(8) m5<1>.yF -g1<0>.xF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
|
||||
add.sat(8) m5<1>.zF g3<4>.yF 0x40000000F /* 2F */ { align16 NoDDClr,NoDDChk };
|
||||
add.sat(8) m5<1>.wF g3<4>.yF 0xc0000000F /* -2F */ { align16 NoDDChk };
|
||||
add(8) m5<1>F g3<4>F 0x2020a038VF /* [1.5F, -0.5F, 0.5F, 0.5F]VF */ { align16 };
|
||||
add(8) g5<1>.zF g4<4>.xF 0xbf800000F /* -1F */ { align16 NoDDClr,NoDDChk };
|
||||
add(8) m5<1>.xyF g12<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
|
||||
add(8) m5<1>.wF -g3<4>.xF 0x3f800000F /* 1F */ { align16 NoDDClr,NoDDChk };
|
||||
add(8) g5<1>.xyF g3<0>.xyyyF g4<4>.xyyyF { align16 NoDDClr };
|
||||
@@ -1,48 +0,0 @@
|
||||
40 00 80 00 29 6d 40 21 28 00 48 00 10 10 10 10
|
||||
40 20 80 00 3d 75 c0 20 40 01 8d 00 20 40 00 00
|
||||
40 20 80 00 bd 77 80 20 40 02 8d 00 c0 00 8d 00
|
||||
40 02 00 00 a6 1c d0 21 10 01 00 00 10 00 00 00
|
||||
40 01 60 00 a5 1c a1 20 40 00 60 00 40 00 00 00
|
||||
40 01 60 00 a5 14 81 20 a0 00 60 00 80 00 60 00
|
||||
40 01 60 00 bd 77 6f 20 64 00 6e 00 a4 00 6e 00
|
||||
40 20 80 00 bd 7f 00 23 80 02 8d 00 00 00 80 3f
|
||||
40 20 80 00 a5 1c c0 21 c0 01 8d 00 01 00 00 00
|
||||
40 05 60 00 be 77 a7 20 44 01 6a 00 04 01 6a 00
|
||||
40 20 80 06 bd 77 c0 20 00 01 8d 00 80 00 8d 00
|
||||
40 00 60 00 28 2d 00 22 80 00 ae 00 40 00 40 00
|
||||
40 10 60 00 28 2d 00 22 a0 00 ae 00 40 00 40 00
|
||||
40 01 60 00 bd 7f 63 20 44 00 65 00 00 00 80 3f
|
||||
40 20 80 00 a6 14 40 20 c0 00 8d 00 0c 01 00 00
|
||||
40 20 80 00 a6 1c c0 21 80 00 8d 00 0c 00 00 00
|
||||
40 20 80 80 bd 77 c0 20 80 00 8d 00 44 00 00 00
|
||||
40 00 60 00 29 6d a0 24 28 00 48 00 10 10 10 10
|
||||
40 00 60 00 3d 75 a0 24 a0 04 8d 00 20 40 00 00
|
||||
40 00 60 00 a5 1c a0 24 40 00 00 00 01 00 00 00
|
||||
40 01 60 00 be 7f a1 20 60 00 60 00 00 00 00 3f
|
||||
40 20 80 00 a5 14 80 20 40 00 00 00 48 40 00 00
|
||||
40 01 60 80 be 77 af 20 e4 00 6e 00 04 01 6e 00
|
||||
40 01 60 00 bd 5f e7 23 84 03 6a 00 00 00 30 30
|
||||
40 05 60 80 be 77 a7 20 24 03 6a 00 44 03 6a 00
|
||||
40 01 60 04 bd 7f 01 21 00 41 60 00 00 00 80 3f
|
||||
40 20 80 00 29 25 82 40 82 00 ae 00 c0 00 ae 00
|
||||
40 20 80 04 bd 7f 80 20 c0 40 8d 00 00 00 80 3f
|
||||
40 05 60 00 bd 7f 83 20 84 00 65 00 00 00 80 bf
|
||||
40 01 60 00 be 77 a7 20 84 00 6a 00 44 00 0a 00
|
||||
40 20 80 00 be 7f 40 20 00 42 8d 00 00 00 80 3f
|
||||
40 09 60 00 be 77 ac 20 00 01 64 00 20 01 64 00
|
||||
40 01 60 00 21 0c 81 20 80 00 60 00 40 00 00 00
|
||||
40 01 60 80 be 7f a2 20 2a 00 0a 00 00 00 00 3f
|
||||
40 20 80 00 be 77 40 20 c0 02 8d 00 40 00 00 00
|
||||
40 20 80 00 22 0c c0 21 80 00 8d 00 10 01 00 00
|
||||
40 11 60 00 bd 77 af 20 24 41 64 00 2e 01 6e 00
|
||||
40 0d 60 80 be 77 a2 20 c0 00 60 00 e0 00 60 00
|
||||
40 09 60 80 be 77 a8 20 c0 00 60 00 e0 00 60 00
|
||||
40 20 80 04 bd 77 00 22 40 02 8d 00 40 01 8d 00
|
||||
40 05 60 80 be 7f a2 20 20 40 00 00 00 00 00 3f
|
||||
40 0d 60 80 be 7f a4 20 65 00 65 00 00 00 00 40
|
||||
40 09 60 80 be 7f a8 20 65 00 65 00 00 00 00 c0
|
||||
40 01 60 00 be 5f af 20 64 00 6e 00 38 a0 20 20
|
||||
40 0d 60 00 bd 7f a4 20 80 00 60 00 00 00 80 bf
|
||||
40 05 60 00 be 7f a3 20 84 01 65 00 00 00 00 3f
|
||||
40 0d 60 00 be 7f a8 20 60 40 60 00 00 00 80 3f
|
||||
40 05 60 00 bd 77 a3 20 64 00 05 00 84 00 65 00
|
||||
@@ -1,17 +0,0 @@
|
||||
and(8) g9<1>.wUD g9<4>.wUD 524032D { align16 };
|
||||
and(16) g4<1>D g6<8,8,1>D 1D { align1 compr };
|
||||
and(8) g10<1>.xD g10<4>.xD 1D { align16 };
|
||||
and(16) g6<1>UD g10<8,8,1>UD g8<8,8,1>UD { align1 compr };
|
||||
and.nz.f0.0(16) null<1>D g6<8,8,1>UD 1D { align1 compr };
|
||||
and(16) g4<1>D g8<8,8,1>UD 1D { align1 compr };
|
||||
and(8) g2<1>D g2<8,8,1>UD 1D { align1 };
|
||||
and.nz.f0.0(8) null<1>.xD g9<4>.xUD 1D { align16 };
|
||||
and(16) g12<1>UD g2.4<0,1,0>UD 0x80000000UD { align1 compr };
|
||||
and.nz.f0.0(16) g110<1>D g6<8,8,1>D 1D { align1 compr };
|
||||
and(8) g17<1>.xUD g1<0>.xUD 0x80000000UD { align16 };
|
||||
and.nz.f0.0(16) g6<1>D g4<8,8,1>UD 1D { align1 compr };
|
||||
and(1) g12<1>UD f0<0,1,0>UW 0x0000000fUD { align1 nomask };
|
||||
and(8) g5<1>.xUD g1<0>.xUD g1<0>.yUD { align16 };
|
||||
and(8) g8<1>.xD g7<4>.xUD 1D { align16 };
|
||||
and.nz.f0.0(8) g6<1>.xD g6<4>.xD 1D { align16 };
|
||||
and.nz.f0.0(1) null<1>UD g1.6<0,1,0>UD 0x04000000UD { align1 };
|
||||
@@ -1,17 +0,0 @@
|
||||
05 01 60 00 21 1c 28 21 2f 01 6f 00 00 ff 07 00
|
||||
05 20 80 00 a5 1c 80 20 c0 00 8d 00 01 00 00 00
|
||||
05 01 60 00 a5 1c 41 21 40 01 60 00 01 00 00 00
|
||||
05 20 80 00 21 04 c0 20 40 01 8d 00 00 01 8d 00
|
||||
05 20 80 02 24 1c 00 20 c0 00 8d 00 01 00 00 00
|
||||
05 20 80 00 25 1c 80 20 00 01 8d 00 01 00 00 00
|
||||
05 00 60 00 25 1c 40 20 40 00 8d 00 01 00 00 00
|
||||
05 01 60 02 24 1c 01 20 20 01 60 00 01 00 00 00
|
||||
05 20 80 00 21 0c 80 21 50 00 00 00 00 00 00 80
|
||||
05 20 80 02 a5 1c c0 2d c0 00 8d 00 01 00 00 00
|
||||
05 01 60 00 21 0c 21 22 20 00 00 00 00 00 00 80
|
||||
05 20 80 02 25 1c c0 20 80 00 8d 00 01 00 00 00
|
||||
05 02 00 00 01 0d 80 21 00 06 00 00 0f 00 00 00
|
||||
05 01 60 00 21 04 a1 20 20 00 00 00 25 00 05 00
|
||||
05 01 60 00 25 1c 01 21 e0 00 60 00 01 00 00 00
|
||||
05 01 60 02 a5 1c c1 20 c0 00 60 00 01 00 00 00
|
||||
05 00 00 02 20 0c 00 20 38 00 00 00 00 00 00 04
|
||||
@@ -1,5 +0,0 @@
|
||||
asr(16) g4<1>D -g1.6<0,1,0>D 31D { align1 compr };
|
||||
asr.nz.f0.0(16) null<1>D -g1.6<0,1,0>D 31D { align1 compr };
|
||||
asr(8) g4<1>D g5<4>D g4<4>UD { align16 };
|
||||
asr(8) g11<1>.xD g5<4>.xD 0x00000002UD { align16 };
|
||||
asr(16) g10<1>D g6<8,8,1>D 0x00000002UD { align1 compr };
|
||||
@@ -1,5 +0,0 @@
|
||||
0c 20 80 00 a5 1c 80 20 38 40 00 00 1f 00 00 00
|
||||
0c 20 80 02 a4 1c 00 20 38 40 00 00 1f 00 00 00
|
||||
0c 01 60 00 a5 04 8f 20 a4 00 6e 00 84 00 6e 00
|
||||
0c 01 60 00 a5 0c 61 21 a0 00 60 00 02 00 00 00
|
||||
0c 20 80 00 a5 0c 40 21 c0 00 8d 00 02 00 00 00
|
||||
@@ -1,5 +0,0 @@
|
||||
(-f0.0) break(16) Jump: 10 Pop: 0 { align1 };
|
||||
break(16) Jump: 5 Pop: 1 { align1 };
|
||||
(+f0.0) break(16) Jump: 156 Pop: 0 { align1 };
|
||||
(+f0.0.x) break(8) Jump: 16 Pop: 0 { align16 };
|
||||
break(8) Jump: 6 Pop: 2 { align16 };
|
||||
@@ -1,5 +0,0 @@
|
||||
28 00 91 00 00 1c 00 34 00 14 60 00 0a 00 00 00
|
||||
28 00 80 00 00 1c 00 34 00 14 60 00 05 00 01 00
|
||||
28 00 81 00 00 1c 00 34 00 14 60 00 9c 00 00 00
|
||||
28 01 62 00 00 1c 0f 34 04 14 6e 00 10 00 00 00
|
||||
28 01 60 00 00 1c 0f 34 04 14 6e 00 06 00 02 00
|
||||
@@ -1,80 +0,0 @@
|
||||
cmp.l.f0.0(8) null<1>F g8<4>.wF 0x0F /* 0F */ { align16 };
|
||||
cmp.nz.f0.0(8) null<1>F g3<0>.xyzzF 0x74746e64VF /* [10F, 15F, 20F, 20F]VF */ { align16 };
|
||||
cmp.nz.f0.0(8) null<1>D g7<4>.xyzzD 0D { align16 };
|
||||
cmp.ge.f0.0(16) g6<1>F g4<8,8,1>F 0x3189705fF /* 4e-09F */ { align1 compr };
|
||||
cmp.l.f0.0(16) g8<1>F g4<8,8,1>F 0x3189705fF /* 4e-09F */ { align1 compr };
|
||||
cmp.l.f0.0(16) g8<1>F g4<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
cmp.ge.f0.0(16) g10<1>F g4<8,8,1>F g6<8,8,1>F { align1 compr };
|
||||
cmp.z.f0.0(8) g10<1>.xD g4<0>.xD 0D { align16 };
|
||||
cmp.l.f0.0(8) g7<1>.xF g7<4>.xF 0x3189705fF /* 4e-09F */ { align16 };
|
||||
cmp.ge.f0.0(8) g6<1>.xF g2<0>.xF g6<4>.xF { align16 };
|
||||
cmp.z.f0.0(8) null<1>F g3<0>.zwwwF g3<0>.xyyyF { align16 };
|
||||
cmp.ge.f0.0(16) null<1>D g14<8,8,1>D 16D { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>D g2<0,1,0>D 1D { align1 compr };
|
||||
cmp.z.f0.0(16) g8<1>F g32<8,8,1>F g2.3<0,1,0>F { align1 compr };
|
||||
cmp.ge.f0.0(16) null<1>F g6<8,8,1>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.nz.f0.0(8) null<1>F g12<4>.xyyyF g1<0>.xyyyF { align16 };
|
||||
cmp.z.f0.0(8) null<1>D g6<4>D g2.4<0>D { align16 };
|
||||
cmp.z.f0.0(16) g6<1>D g2.1<0,1,0>D 39D { align1 compr };
|
||||
cmp.ge.f0.0(8) null<1>F g5<4>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.le.f0.0(8) g5<1>.xF g5<4>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.z.f0.0(16) g4<1>F g2.1<0,1,0>F 0x41000000F /* 8F */ { align1 compr };
|
||||
cmp.z.f0.0(8) g5<1>.xD g5<4>.xD g1<0>.zD { align16 };
|
||||
cmp.l.f0.0(8) g3<1>.xyF g1<0>.xyyyF g1<0>.zwwwF { align16 };
|
||||
cmp.z.f0.0(16) null<1>D g2<0,1,0>D 1D { align1 compr };
|
||||
cmp.z.f0.0(16) null<1>F g14<8,8,1>F g2.1<0,1,0>F { align1 compr };
|
||||
cmp.z.f0.0(8) g6<1>.xF g6<4>.xF g3<0>.yF { align16 };
|
||||
cmp.nz.f0.0(16) g4<1>F g6<8,8,1>F g2.2<0,1,0>F { align1 compr };
|
||||
cmp.ge.f0.0(16) null<1>F (abs)g14<8,8,1>F (abs)g8<8,8,1>F { align1 compr };
|
||||
cmp.nz.f0.0(8) g5<1>F g5<8,8,1>F g37<8,8,1>F { align1 };
|
||||
cmp.ge.f0.0(8) null<1>.xD g5<4>.xD 4D { align16 };
|
||||
cmp.nz.f0.0(16) null<1>F g2.4<0,1,0>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.z.f0.0(16) null<1>F g4.1<0,1,0>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
cmp.ge.f0.0(16) g4<1>D g2<0,1,0>D 1D { align1 compr };
|
||||
cmp.nz.f0.0(16) g4<1>D g2.1<0,1,0>D 0D { align1 compr };
|
||||
cmp.z.f0.0(16) g8<1>D g6<8,8,1>D g2.5<0,1,0>D { align1 compr };
|
||||
cmp.nz.f0.0(16) null<1>D g2<0,1,0>D 0D { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>F g4<8,8,1>F g2.5<0,1,0>F { align1 compr };
|
||||
cmp.l.f0.0(16) g6<1>D g3<0,1,0>D 1D { align1 compr };
|
||||
cmp.ge.f0.0(16) g4<1>D g2.3<0,1,0>D g2<0,1,0>D { align1 compr };
|
||||
cmp.nz.f0.0(8) g3<1>.xD g1<0>.xD g1<0>.yD { align16 };
|
||||
cmp.nz.f0.0(8) g3<1>.xyzF g1<0>.xyzzF g1.4<0>.xyzzF { align16 };
|
||||
cmp.nz.f0.0(8) null<1>F g1<0>.xF 0x0F /* 0F */ { align16 };
|
||||
cmp.le.f0.0(8) g5<1>.xD g1<0>.xD 0D { align16 };
|
||||
cmp.l.f0.0(16) g4<1>D g2.1<0,1,0>D g2<0,1,0>D { align1 compr };
|
||||
cmp.ge.f0.0(8) g3<1>D g1<0>D g1.4<0>D { align16 };
|
||||
cmp.le.f0.0(16) null<1>F g4<8,8,1>F 0x3f000000F /* 0.5F */ { align1 compr };
|
||||
cmp.le.f0.0(16) g20<1>F g4<8,8,1>F 0x461c3f9aF /* 9999.9F */ { align1 compr };
|
||||
cmp.z.f0.0(8) null<1>F g3<0>.xyzzF 0x6e6e6c6aVF /* [13F, 14F, 15F, 15F]VF */ { align16 };
|
||||
cmp.nz.f0.0(8) null<1>D g1<0>.xyzzD g1.4<0>.xyzzD { align16 };
|
||||
cmp.ge.f0.0(8) null<1>.xD g5<4>.xD g3<0>.xD { align16 };
|
||||
cmp.g.f0.0(8) g4<1>F g3<4>F 0x3f000000F /* 0.5F */ { align16 };
|
||||
cmp.nz.f0.0(16) g8<1>F g2.2<0,1,0>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.l.f0.0(8) null<1>F g1<0>F g3<4>F { align16 };
|
||||
cmp.g.f0.0(8) null<1>.xF g2<4>.yF 0x0F /* 0F */ { align16 };
|
||||
cmp.nz.f0.0(16) null<1>D g16<8,8,1>D g12<8,8,1>D { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>F g2<0,1,0>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.z.f0.0(8) null<1>.xD g1<0>.xD 1D { align16 };
|
||||
cmp.nz.f0.0(16) g6<1>D g4<8,8,1>D g2.2<0,1,0>D { align1 compr };
|
||||
cmp.g.f0.0(16) g16<1>F (abs)g8<8,8,1>F 0x3f800000F /* 1F */ { align1 compr };
|
||||
cmp.l.f0.0(8) g5<1>.xD g1<0>.yD g1<0>.xD { align16 };
|
||||
cmp.ge.f0.0(8) g6<1>.xF g3<4>.xF 0x41f00000F /* 30F */ { align16 };
|
||||
cmp.g.f0.0(16) null<1>D g2.1<0,1,0>D 0D { align1 compr };
|
||||
cmp.ge.f0.0(16) null<1>D g4<8,8,1>D g2.1<0,1,0>D { align1 compr };
|
||||
cmp.le.f0.0(8) null<1>.xF g8<4>.xF 0x3f000000F /* 0.5F */ { align16 };
|
||||
cmp.ge.f0.0(8) null<1>.xF g22<4>.xF g10<4>.xF { align16 };
|
||||
cmp.z.f0.0(8) g9<1>.xF g1<0>.xF 0x40b79581F /* 5.737F */ { align16 };
|
||||
cmp.z.f0.0(16) null<1>D g6<8,8,1>D g2<0,1,0>D { align1 compr };
|
||||
cmp.nz.f0.0(16) null<1>F g4<8,8,1>F g8<8,8,1>F { align1 compr };
|
||||
(+f0.1) cmp.z.f0.1(16) null<1>D g6<8,8,1>D 0D { align1 compr };
|
||||
cmp.nz.f0.0(8) g11<1>.xD g4<4>.xD 10D { align16 };
|
||||
cmp.nz.f0.0(8) g3<1>F g3<4>F 0x0F /* 0F */ { align16 };
|
||||
cmp.le.f0.0(16) g4<1>D g2<0,1,0>D 0D { align1 compr };
|
||||
cmp.l.f0.0(8) null<1>.xD g6<4>.xD g5<4>.xD { align16 };
|
||||
cmp.ge.f0.0(8) g10<1>.xD g5<4>.xD 2D { align16 };
|
||||
cmp.g.f0.0(8) null<1>.xD g3<0>.zD 4D { align16 };
|
||||
cmp.g.f0.0(16) null<1>F g20<8,8,1>F 0x0F /* 0F */ { align1 compr };
|
||||
cmp.l.f0.0(16) null<1>D g2<0,1,0>D g6<8,8,1>D { align1 compr };
|
||||
(+f0.1) cmp.nz.f0.1(16) null<1>UW g0<8,8,1>UW g0<8,8,1>UW { align1 };
|
||||
cmp.le.f0.0(8) g3<1>.xUD g1<0>.xUD 0x00000001UD { align16 };
|
||||
cmp.g.f0.0(8) g8<1>.xD g1<0>.xD 2D { align16 };
|
||||
@@ -1,80 +0,0 @@
|
||||
10 01 60 05 bc 7f 0f 20 0f 01 6f 00 00 00 00 00
|
||||
10 01 60 02 bc 5f 0f 20 64 00 0a 00 64 6e 74 74
|
||||
10 01 60 02 a4 1c 0f 20 e4 00 6a 00 00 00 00 00
|
||||
10 20 80 04 bd 7f c0 20 80 00 8d 00 5f 70 89 31
|
||||
10 20 80 05 bd 7f 00 21 80 00 8d 00 5f 70 89 31
|
||||
10 20 80 05 bd 77 00 21 80 00 8d 00 c0 00 8d 00
|
||||
10 20 80 04 bd 77 40 21 80 00 8d 00 c0 00 8d 00
|
||||
10 01 60 01 a5 1c 41 21 80 00 00 00 00 00 00 00
|
||||
10 01 60 05 bd 7f e1 20 e0 00 60 00 5f 70 89 31
|
||||
10 01 60 04 bd 77 c1 20 40 00 00 00 c0 00 60 00
|
||||
10 01 60 01 bc 77 0f 20 6e 00 0f 00 64 00 05 00
|
||||
10 20 80 04 a4 1c 00 20 c0 01 8d 00 10 00 00 00
|
||||
10 20 80 05 a4 1c 00 20 40 00 00 00 01 00 00 00
|
||||
10 20 80 01 bd 77 00 21 00 04 8d 00 4c 00 00 00
|
||||
10 20 80 04 bc 7f 00 20 c0 00 8d 00 00 00 00 00
|
||||
10 01 60 02 bc 77 0f 20 84 01 65 00 24 00 05 00
|
||||
10 01 60 01 a4 14 0f 20 c4 00 6e 00 54 00 0e 00
|
||||
10 20 80 01 a5 1c c0 20 44 00 00 00 27 00 00 00
|
||||
10 01 60 04 bc 7f 0f 20 a0 00 60 00 00 00 00 00
|
||||
10 01 60 06 bd 7f a1 20 a0 00 60 00 00 00 00 00
|
||||
10 20 80 01 bd 7f 80 20 44 00 00 00 00 00 00 41
|
||||
10 01 60 01 a5 14 a1 20 a0 00 60 00 2a 00 0a 00
|
||||
10 01 60 05 bd 77 63 20 24 00 05 00 2e 00 0f 00
|
||||
10 20 80 01 a4 1c 00 20 40 00 00 00 01 00 00 00
|
||||
10 20 80 01 bc 77 00 20 c0 01 8d 00 44 00 00 00
|
||||
10 01 60 01 bd 77 c1 20 c0 00 60 00 65 00 05 00
|
||||
10 20 80 02 bd 77 80 20 c0 00 8d 00 48 00 00 00
|
||||
10 20 80 04 bc 77 00 20 c0 21 8d 00 00 21 8d 00
|
||||
10 00 60 02 bd 77 a0 20 a0 00 8d 00 a0 04 8d 00
|
||||
10 01 60 04 a4 1c 01 20 a0 00 60 00 04 00 00 00
|
||||
10 20 80 02 bc 7f 00 20 50 00 00 00 00 00 00 00
|
||||
10 20 80 01 bc 7f 00 20 84 00 00 00 00 00 80 3f
|
||||
10 20 80 04 a5 1c 80 20 40 00 00 00 01 00 00 00
|
||||
10 20 80 02 a5 1c 80 20 44 00 00 00 00 00 00 00
|
||||
10 20 80 01 a5 14 00 21 c0 00 8d 00 54 00 00 00
|
||||
10 20 80 02 a4 1c 00 20 40 00 00 00 00 00 00 00
|
||||
10 20 80 05 bc 77 00 20 80 00 8d 00 54 00 00 00
|
||||
10 20 80 05 a5 1c c0 20 60 00 00 00 01 00 00 00
|
||||
10 20 80 04 a5 14 80 20 4c 00 00 00 40 00 00 00
|
||||
10 01 60 02 a5 14 61 20 20 00 00 00 25 00 05 00
|
||||
10 01 60 02 bd 77 67 20 24 00 0a 00 34 00 0a 00
|
||||
10 01 60 02 bc 7f 0f 20 20 00 00 00 00 00 00 00
|
||||
10 01 60 06 a5 1c a1 20 20 00 00 00 00 00 00 00
|
||||
10 20 80 05 a5 14 80 20 44 00 00 00 40 00 00 00
|
||||
10 01 60 04 a5 14 6f 20 24 00 0e 00 34 00 0e 00
|
||||
10 20 80 06 bc 7f 00 20 80 00 8d 00 00 00 00 3f
|
||||
10 20 80 06 bd 7f 80 22 80 00 8d 00 9a 3f 1c 46
|
||||
10 01 60 01 bc 5f 0f 20 64 00 0a 00 6a 6c 6e 6e
|
||||
10 01 60 02 a4 14 0f 20 24 00 0a 00 34 00 0a 00
|
||||
10 01 60 04 a4 14 01 20 a0 00 60 00 60 00 00 00
|
||||
10 01 60 03 bd 7f 8f 20 64 00 6e 00 00 00 00 3f
|
||||
10 20 80 02 bd 7f 00 21 48 00 00 00 00 00 00 00
|
||||
10 01 60 05 bc 77 0f 20 24 00 0e 00 64 00 6e 00
|
||||
10 01 60 03 bc 7f 01 20 45 00 65 00 00 00 00 00
|
||||
10 20 80 02 a4 14 00 20 00 02 8d 00 80 01 8d 00
|
||||
10 20 80 05 bc 7f 00 20 40 00 00 00 00 00 00 00
|
||||
10 01 60 01 a4 1c 01 20 20 00 00 00 01 00 00 00
|
||||
10 20 80 02 a5 14 c0 20 80 00 8d 00 48 00 00 00
|
||||
10 20 80 03 bd 7f 00 22 00 21 8d 00 00 00 80 3f
|
||||
10 01 60 05 a5 14 a1 20 25 00 05 00 20 00 00 00
|
||||
10 01 60 04 bd 7f c1 20 60 00 60 00 00 00 f0 41
|
||||
10 20 80 03 a4 1c 00 20 44 00 00 00 00 00 00 00
|
||||
10 20 80 04 a4 14 00 20 80 00 8d 00 44 00 00 00
|
||||
10 01 60 06 bc 7f 01 20 00 01 60 00 00 00 00 3f
|
||||
10 01 60 04 bc 77 01 20 c0 02 60 00 40 01 60 00
|
||||
10 01 60 01 bd 7f 21 21 20 00 00 00 81 95 b7 40
|
||||
10 20 80 01 a4 14 00 20 c0 00 8d 00 40 00 00 00
|
||||
10 20 80 02 bc 77 00 20 80 00 8d 00 00 01 8d 00
|
||||
10 20 81 01 a4 1c 00 20 c0 00 8d 02 00 00 00 00
|
||||
10 01 60 02 a5 1c 61 21 80 00 60 00 0a 00 00 00
|
||||
10 01 60 02 bd 7f 6f 20 64 00 6e 00 00 00 00 00
|
||||
10 20 80 06 a5 1c 80 20 40 00 00 00 00 00 00 00
|
||||
10 01 60 05 a4 14 01 20 c0 00 60 00 a0 00 60 00
|
||||
10 01 60 04 a5 1c 41 21 a0 00 60 00 02 00 00 00
|
||||
10 01 60 03 a4 1c 01 20 6a 00 0a 00 04 00 00 00
|
||||
10 20 80 03 bc 7f 00 20 80 02 8d 00 00 00 00 00
|
||||
10 20 80 05 a4 14 00 20 40 00 00 00 c0 00 8d 00
|
||||
10 00 81 02 28 25 00 20 00 00 8d 02 00 00 8d 00
|
||||
10 01 60 06 21 0c 61 20 20 00 00 00 01 00 00 00
|
||||
10 01 60 03 a5 1c 01 21 20 00 00 00 02 00 00 00
|
||||
@@ -1,2 +0,0 @@
|
||||
cont(16) Jump: 4 Pop: 1 { align1 };
|
||||
cont(8) Jump: 4 Pop: 1 { align16 };
|
||||
@@ -1,2 +0,0 @@
|
||||
29 00 80 00 00 1c 00 34 00 14 60 00 04 00 01 00
|
||||
29 01 60 00 00 1c 0f 34 04 14 6e 00 04 00 01 00
|
||||
@@ -1,2 +0,0 @@
|
||||
do(16) { align1 };
|
||||
do(8) { align16 };
|
||||
@@ -1,2 +0,0 @@
|
||||
26 00 80 00 9c 73 00 20 00 00 8d 00 00 00 8d 00
|
||||
26 01 60 00 9c 73 0f 20 04 00 6e 00 04 00 6e 00
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user