From 0b42a6c3b57b3ffede80e25376e0c0a0a6239b30 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Tue, 20 Jun 2023 21:09:26 -0700 Subject: [PATCH] anv: Add CCS cache flush bits to anv_pipe_bits This will help us to flush the entries out of the CCS cache. v2: - Move enum value close to HW bits section (Lionel) Signed-off-by: Sagar Ghuge Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/anv_private.h | 5 +++++ src/intel/vulkan/anv_util.c | 2 ++ src/intel/vulkan/genX_cmd_buffer.c | 2 ++ 3 files changed, 9 insertions(+) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 42ce629b486..68d3fd113a4 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2201,6 +2201,11 @@ enum anv_pipe_bits { */ ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT = (1 << 16), + /* This bit controls the flushing of the engine (Render, Compute) specific + * entries from the compression cache. + */ + ANV_PIPE_CCS_CACHE_FLUSH_BIT = (1 << 17), + ANV_PIPE_CS_STALL_BIT = (1 << 20), ANV_PIPE_END_OF_PIPE_SYNC_BIT = (1 << 21), diff --git a/src/intel/vulkan/anv_util.c b/src/intel/vulkan/anv_util.c index ddb1bd9af18..3813ad2d713 100644 --- a/src/intel/vulkan/anv_util.c +++ b/src/intel/vulkan/anv_util.c @@ -90,4 +90,6 @@ anv_dump_pipe_bits(enum anv_pipe_bits bits, FILE *f) fputs("+cs_stall ", f); if (bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT) fputs("+utdp_flush", f); + if (bits & ANV_PIPE_CCS_CACHE_FLUSH_BIT) + fputs("+ccs_flush ", f); } diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 23441ad4f31..eed52b0d79c 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -77,6 +77,7 @@ convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) { bits |= (pc->CommandStreamerStallEnable) ? ANV_PIPE_CS_STALL_BIT : 0; #if GFX_VERx10 == 125 bits |= (pc->UntypedDataPortCacheFlushEnable) ? ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT : 0; + bits |= (pc->CCSFlushEnable) ? ANV_PIPE_CCS_CACHE_FLUSH_BIT : 0; #endif return bits; } @@ -3132,6 +3133,7 @@ genX(batch_emit_pipe_control_write)(struct anv_batch *batch, #if GFX_VERx10 >= 125 pipe.UntypedDataPortCacheFlushEnable = bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT; + pipe.CCSFlushEnable = bits & ANV_PIPE_CCS_CACHE_FLUSH_BIT; #endif #if GFX_VER >= 12 pipe.TileCacheFlushEnable = bits & ANV_PIPE_TILE_CACHE_FLUSH_BIT;