From 0ab2fa18e4b2d1303f7043c6841aa93020512224 Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Thu, 29 Jul 2021 17:04:14 -0700 Subject: [PATCH] intel/isl: Use an allow-list in gfx6_filter_tiling Try to avoid having to update isl_gfx6_filter_tiling when new tilings are added for new platforms. Note that the allow-list uses ISL_TILING_ANY_Y_MASK and thus assumes that no new Y-tilings will be added in the future. Suggested-by: Jason Ekstrand Reviewed-by: Jason Ekstrand Part-of: --- src/intel/isl/isl_gfx7.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/src/intel/isl/isl_gfx7.c b/src/intel/isl/isl_gfx7.c index de5524e3fdc..e02045d7bb8 100644 --- a/src/intel/isl/isl_gfx7.c +++ b/src/intel/isl/isl_gfx7.c @@ -197,9 +197,21 @@ isl_gfx6_filter_tiling(const struct isl_device *dev, assert(ISL_DEV_USE_SEPARATE_STENCIL(dev)); /* Clear flags unsupported on this hardware */ - if (ISL_GFX_VER(dev) < 9) { - *flags &= ~ISL_TILING_Yf_BIT; - *flags &= ~ISL_TILING_Ys_BIT; + assert(ISL_GFX_VERX10(dev) < 125); + if (ISL_GFX_VER(dev) >= 12) { + *flags &= ISL_TILING_LINEAR_BIT | + ISL_TILING_X_BIT | + ISL_TILING_ANY_Y_MASK; + } else if (ISL_GFX_VER(dev) >= 9) { + *flags &= ISL_TILING_LINEAR_BIT | + ISL_TILING_X_BIT | + ISL_TILING_W_BIT | + ISL_TILING_ANY_Y_MASK; + } else { + *flags &= ISL_TILING_LINEAR_BIT | + ISL_TILING_X_BIT | + ISL_TILING_W_BIT | + ISL_TILING_Y0_BIT; } /* And... clear the Yf and Ys bits anyway because Anvil doesn't support