diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 2af14b33f68..5a4a9ffc655 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -80,6 +80,7 @@ static const driOptionDescription anv_dri_options[] = {
DRI_CONF_ANV_ASSUME_FULL_SUBGROUPS(0)
DRI_CONF_ANV_DISABLE_FCV(false)
DRI_CONF_ANV_SAMPLE_MASK_OUT_OPENGL_BEHAVIOUR(false)
+ DRI_CONF_ANV_FORCE_FILTER_ADDR_ROUNDING(false)
DRI_CONF_ANV_FP64_WORKAROUND_ENABLED(false)
DRI_CONF_ANV_GENERATED_INDIRECT_THRESHOLD(4)
DRI_CONF_ANV_GENERATED_INDIRECT_RING_THRESHOLD(100)
@@ -2469,6 +2470,8 @@ anv_init_dri_options(struct anv_instance *instance)
driQueryOptionb(&instance->dri_options, "limit_trig_input_range");
instance->sample_mask_out_opengl_behaviour =
driQueryOptionb(&instance->dri_options, "anv_sample_mask_out_opengl_behaviour");
+ instance->force_filter_addr_rounding =
+ driQueryOptionb(&instance->dri_options, "anv_force_filter_addr_rounding");
instance->lower_depth_range_rate =
driQueryOptionf(&instance->dri_options, "lower_depth_range_rate");
instance->no_16bit =
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 0f46e99a688..d06dc723882 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1172,6 +1172,7 @@ struct anv_instance {
uint8_t assume_full_subgroups;
bool limit_trig_input_range;
bool sample_mask_out_opengl_behaviour;
+ bool force_filter_addr_rounding;
bool fp64_workaround_enabled;
float lower_depth_range_rate;
unsigned generated_indirect_threshold;
diff --git a/src/intel/vulkan/genX_init_state.c b/src/intel/vulkan/genX_init_state.c
index b52023bfda4..a6bd444cf03 100644
--- a/src/intel/vulkan/genX_init_state.c
+++ b/src/intel/vulkan/genX_init_state.c
@@ -1154,8 +1154,12 @@ VkResult genX(CreateSampler)(
const VkFilter mag_filter =
plane_has_chroma ? sampler->vk.ycbcr_conversion->state.chroma_filter :
pCreateInfo->magFilter;
- const bool enable_min_filter_addr_rounding = min_filter != VK_FILTER_NEAREST;
- const bool enable_mag_filter_addr_rounding = mag_filter != VK_FILTER_NEAREST;
+ const bool force_addr_rounding =
+ device->physical->instance->force_filter_addr_rounding;
+ const bool enable_min_filter_addr_rounding =
+ force_addr_rounding || min_filter != VK_FILTER_NEAREST;
+ const bool enable_mag_filter_addr_rounding =
+ force_addr_rounding || mag_filter != VK_FILTER_NEAREST;
/* From Broadwell PRM, SAMPLER_STATE:
* "Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces."
*/
diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-mesa-defaults.conf
index 440e0f2ec81..521ea9321ad 100644
--- a/src/util/00-mesa-defaults.conf
+++ b/src/util/00-mesa-defaults.conf
@@ -1189,6 +1189,9 @@ TODO: document the other workarounds.
+
+
+
diff --git a/src/util/driconf.h b/src/util/driconf.h
index 04bf560f8bf..837e3541075 100644
--- a/src/util/driconf.h
+++ b/src/util/driconf.h
@@ -736,6 +736,10 @@
DRI_CONF_OPT_B(anv_sample_mask_out_opengl_behaviour, def, \
"Ignore sample mask out when having single sampled target")
+#define DRI_CONF_ANV_FORCE_FILTER_ADDR_ROUNDING(def) \
+ DRI_CONF_OPT_B(anv_force_filter_addr_rounding, def, \
+ "Force min/mag filter address rounding to be enabled even for NEAREST sampling")
+
#define DRI_CONF_ANV_MESH_CONV_PRIM_ATTRS_TO_VERT_ATTRS(def) \
DRI_CONF_OPT_E(anv_mesh_conv_prim_attrs_to_vert_attrs, def, -2, 2, \
"Apply workaround for gfx12.5 per-prim attribute corruption HW bug", \