nir: add mqsad_4x8, shfr and nir_opt_mqsad
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26251>
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@@ -37,6 +37,8 @@ protected:
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void test_2src_op(nir_op op, int64_t src0, int64_t src1);
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void require_one_alu(nir_op op);
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nir_variable *res_var;
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};
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@@ -85,6 +87,18 @@ void algebraic_test_base::test_2src_op(nir_op op, int64_t src0, int64_t src1)
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test_op(op, nir_imm_int(b, src0), nir_imm_int(b, src1), NULL, NULL, desc);
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}
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void algebraic_test_base::require_one_alu(nir_op op)
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{
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unsigned count = 0;
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nir_foreach_instr(instr, nir_start_block(b->impl)) {
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if (instr->type == nir_instr_type_alu) {
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ASSERT_TRUE(nir_instr_as_alu(instr)->op == op);
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ASSERT_EQ(count, 0);
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count++;
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}
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}
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}
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class nir_opt_algebraic_test : public algebraic_test_base {
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protected:
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virtual void run_pass() {
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@@ -99,6 +113,13 @@ protected:
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}
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};
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class nir_opt_mqsad_test : public algebraic_test_base {
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protected:
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virtual void run_pass() {
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nir_opt_mqsad(b->shader);
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}
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};
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TEST_F(nir_opt_algebraic_test, umod_pow2_src2)
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{
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for (int i = 0; i <= 9; i++)
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@@ -162,14 +183,58 @@ TEST_F(nir_opt_algebraic_test, msad)
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nir_opt_dce(b->shader);
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}
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unsigned count = 0;
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nir_foreach_instr(instr, nir_start_block(b->impl)) {
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if (instr->type == nir_instr_type_alu) {
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ASSERT_TRUE(nir_instr_as_alu(instr)->op == nir_op_msad_4x8);
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ASSERT_EQ(count, 0);
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count++;
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require_one_alu(nir_op_msad_4x8);
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}
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TEST_F(nir_opt_mqsad_test, mqsad)
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{
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options.lower_bitfield_extract = true;
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options.has_bfe = true;
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options.has_msad = true;
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options.has_shfr32 = true;
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nir_def *ref = nir_load_var(b, nir_local_variable_create(b->impl, glsl_int_type(), "ref"));
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nir_def *src = nir_load_var(b, nir_local_variable_create(b->impl, glsl_ivec_type(2), "src"));
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nir_def *accum = nir_load_var(b, nir_local_variable_create(b->impl, glsl_ivec_type(4), "accum"));
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nir_def *srcx = nir_channel(b, src, 0);
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nir_def *srcy = nir_channel(b, src, 1);
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nir_def *res[4];
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for (unsigned i = 0; i < 4; i++) {
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nir_def *src1 = srcx;
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switch (i) {
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case 0:
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break;
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case 1:
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src1 = nir_bitfield_select(b, nir_imm_int(b, 0xff000000), nir_ishl_imm(b, srcy, 24),
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nir_ushr_imm(b, srcx, 8));
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break;
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case 2:
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src1 = nir_bitfield_select(b, nir_imm_int(b, 0xffff0000), nir_ishl_imm(b, srcy, 16),
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nir_extract_u16(b, srcx, nir_imm_int(b, 1)));
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break;
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case 3:
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src1 = nir_bitfield_select(b, nir_imm_int(b, 0xffffff00), nir_ishl_imm(b, srcy, 8),
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nir_extract_u8_imm(b, srcx, 3));
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break;
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}
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res[i] = nir_msad_4x8(b, ref, src1, nir_channel(b, accum, i));
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}
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nir_store_var(b, nir_local_variable_create(b->impl, glsl_ivec_type(4), "res"), nir_vec(b, res, 4), 0xf);
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while (nir_opt_algebraic(b->shader)) {
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nir_opt_constant_folding(b->shader);
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nir_opt_dce(b->shader);
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}
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ASSERT_TRUE(nir_opt_mqsad(b->shader));
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nir_copy_prop(b->shader);
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nir_opt_dce(b->shader);
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require_one_alu(nir_op_mqsad_4x8);
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}
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TEST_F(nir_opt_idiv_const_test, umod)
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