From 07a826ba938ff40a07d19c31e75892bdfe2c68a1 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 28 May 2024 08:43:09 +0200 Subject: [PATCH] radv: fix flushing DB meta cache on GFX11.5 Only GFX11 is affected by this hw bug. Found by inspection. Cc: mesa-stable Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_cs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cs.c b/src/amd/vulkan/radv_cs.c index 61412ed4db6..4e33c3aa410 100644 --- a/src/amd/vulkan/radv_cs.c +++ b/src/amd/vulkan/radv_cs.c @@ -186,8 +186,9 @@ gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum amd_gfx_level gfx_level *sqtt_flush_bits |= RGP_FLUSH_FLUSH_CB | RGP_FLUSH_INVAL_CB; } + /* GFX11 can't flush DB_META and should use a TS event instead. */ /* TODO: trigger on RADV_CMD_FLAG_FLUSH_AND_INV_DB_META ? */ - if (gfx_level < GFX11 && (flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_DB)) { + if (gfx_level != GFX11 && (flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_DB)) { /* Flush HTILE. Will wait for idle later. */ radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_DB_META) | EVENT_INDEX(0));