diff --git a/src/panfrost/vulkan/panvk_shader.h b/src/panfrost/vulkan/panvk_shader.h index 0131a2deda6..170bd62a65d 100644 --- a/src/panfrost/vulkan/panvk_shader.h +++ b/src/panfrost/vulkan/panvk_shader.h @@ -21,8 +21,7 @@ #include "panvk_pipeline_layout.h" #define PANVK_SYSVAL_UBO_INDEX 0 -#define PANVK_PUSH_CONST_UBO_INDEX 1 -#define PANVK_NUM_BUILTIN_UBOS 2 +#define PANVK_NUM_BUILTIN_UBOS 1 struct nir_shader; struct pan_blend_state; diff --git a/src/panfrost/vulkan/panvk_vX_cmd_buffer.c b/src/panfrost/vulkan/panvk_vX_cmd_buffer.c index c1e37ec6aa0..0dadafe3304 100644 --- a/src/panfrost/vulkan/panvk_vX_cmd_buffer.c +++ b/src/panfrost/vulkan/panvk_vX_cmd_buffer.c @@ -435,15 +435,6 @@ panvk_cmd_prepare_ubos(struct panvk_cmd_buffer *cmdbuf, cfg.entries = DIV_ROUND_UP(sizeof(desc_state->sysvals), 16); } - if (pipeline->layout->push_constants.size) { - pan_pack(&ubo_descs[PANVK_PUSH_CONST_UBO_INDEX], UNIFORM_BUFFER, cfg) { - cfg.pointer = desc_state->push_constants; - cfg.entries = ALIGN_POT(pipeline->layout->push_constants.size, 16); - } - } else { - memset(&ubo_descs[PANVK_PUSH_CONST_UBO_INDEX], 0, sizeof(*ubo_descs)); - } - for (unsigned s = 0; s < pipeline->layout->vk.set_count; s++) { const struct panvk_descriptor_set_layout *set_layout = vk_to_panvk_descriptor_set_layout(pipeline->layout->vk.set_layouts[s]); diff --git a/src/panfrost/vulkan/panvk_vX_shader.c b/src/panfrost/vulkan/panvk_vX_shader.c index 4f09989d1ca..1528236f509 100644 --- a/src/panfrost/vulkan/panvk_vX_shader.c +++ b/src/panfrost/vulkan/panvk_vX_shader.c @@ -191,25 +191,6 @@ panvk_lower_blend(struct panvk_device *dev, nir_shader *nir, } } -static bool -panvk_lower_load_push_constant(nir_builder *b, nir_intrinsic_instr *intr, - void *data) -{ - if (intr->intrinsic != nir_intrinsic_load_push_constant) - return false; - - b->cursor = nir_before_instr(&intr->instr); - nir_def *ubo_load = - nir_load_ubo(b, intr->def.num_components, intr->def.bit_size, - nir_imm_int(b, PANVK_PUSH_CONST_UBO_INDEX), intr->src[0].ssa, - .align_mul = intr->def.bit_size / 8, .align_offset = 0, - .range_base = nir_intrinsic_base(intr), - .range = nir_intrinsic_range(intr)); - nir_def_rewrite_uses(&intr->def, ubo_load); - nir_instr_remove(&intr->instr); - return true; -} - static void shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align) { @@ -343,10 +324,6 @@ panvk_per_arch(shader_create)(struct panvk_device *dev, gl_shader_stage stage, nir_address_format_32bit_offset); } - NIR_PASS_V(nir, nir_shader_intrinsics_pass, panvk_lower_load_push_constant, - nir_metadata_block_index | nir_metadata_dominance, - (void *)layout); - NIR_PASS_V(nir, nir_lower_system_values); NIR_PASS_V(nir, nir_lower_compute_system_values, NULL);