From 07150f9067f780b7d6eb9478fdd25102dd083a7d Mon Sep 17 00:00:00 2001 From: Job Noorman Date: Sun, 31 Aug 2025 10:35:23 +0200 Subject: [PATCH] ir3: use shared masks for cov when scalar ALU is supported Whenever cov doesn't work and we have to use a mask instead, the mask was created as a non-shared immediate, preventing the use of the scalar ALU for the and instruction. Fix this by creating a shared immediate when the scalar ALU is supported. Signed-off-by: Job Noorman Part-of: --- src/freedreno/ir3/ir3_compiler_nir.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index bf46dbc0b27..5d7c475eb74 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -348,8 +348,8 @@ create_cov(struct ir3_context *ctx, unsigned nrpt, * is used to achieve the result. */ if (src_type == TYPE_U8 && full_type(dst_type) == TYPE_U32) { - struct ir3_instruction_rpt mask = - create_immed_typed_rpt(&ctx->build, nrpt, 0xff, TYPE_U8); + struct ir3_instruction_rpt mask = create_immed_typed_shared_rpt( + &ctx->build, nrpt, 0xff, TYPE_U8, ctx->compiler->has_scalar_alu); struct ir3_instruction_rpt cov = ir3_AND_B_rpt(&ctx->build, nrpt, src, 0, mask, 0); set_dst_flags(cov.rpts, nrpt, type_flags(dst_type)); @@ -366,8 +366,8 @@ create_cov(struct ir3_context *ctx, unsigned nrpt, struct ir3_instruction_rpt cov; if (op == nir_op_u2f16 || op == nir_op_u2f32) { - struct ir3_instruction_rpt mask = - create_immed_typed_rpt(&ctx->build, nrpt, 0xff, TYPE_U8); + struct ir3_instruction_rpt mask = create_immed_typed_shared_rpt( + &ctx->build, nrpt, 0xff, TYPE_U8, ctx->compiler->has_scalar_alu); cov = ir3_AND_B_rpt(&ctx->build, nrpt, src, 0, mask, 0); set_dst_flags(cov.rpts, nrpt, IR3_REG_HALF); cov = ir3_COV_rpt(&ctx->build, nrpt, cov, TYPE_U16, dst_type);