From 06504254ce2d725335624126368a8ff84f51f92b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Kai=20Wasserb=C3=A4ch?= Date: Sat, 17 Sep 2022 13:31:35 +0200 Subject: [PATCH] =?UTF-8?q?fix:=20ac/llvm:=20unused=20variable=20=E2=80=98?= =?UTF-8?q?offset=E2=80=99=20[-Wunused-variable]?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only used in debug builds. Signed-off-by: Kai Wasserbäch Reviewed-by: Mihai Preda Part-of: --- src/amd/llvm/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 54e115221c2..fdcb3c5e597 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -2348,7 +2348,7 @@ static void visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr * unsigned writemask = nir_intrinsic_write_mask(instr); unsigned component = nir_intrinsic_component(instr); LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0])); - nir_src offset = *nir_get_io_offset_src(instr); + ASSERTED nir_src offset = *nir_get_io_offset_src(instr); /* No indirect indexing is allowed here. */ assert(nir_src_is_const(offset) && nir_src_as_uint(offset) == 0);