From 05cf04ac97f17b583ffaead91e35e10e86c49926 Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Fri, 9 Feb 2024 14:08:30 -0600 Subject: [PATCH] nvk: Convert shader addresses to offsets in nvk_shader.c Fixes: e162c2e78e86 ("nvk: Use VM_BIND for contiguous heaps instead of copying") Part-of: --- src/nouveau/vulkan/nvk_cmd_buffer.c | 2 +- src/nouveau/vulkan/nvk_compute_pipeline.c | 8 +++---- src/nouveau/vulkan/nvk_graphics_pipeline.c | 2 +- src/nouveau/vulkan/nvk_heap.c | 7 +----- src/nouveau/vulkan/nvk_shader.c | 14 +++++++++--- src/nouveau/vulkan/nvk_shader.h | 25 ++++++++++------------ 6 files changed, 29 insertions(+), 29 deletions(-) diff --git a/src/nouveau/vulkan/nvk_cmd_buffer.c b/src/nouveau/vulkan/nvk_cmd_buffer.c index ddcc1074dc7..435aa9ed90e 100644 --- a/src/nouveau/vulkan/nvk_cmd_buffer.c +++ b/src/nouveau/vulkan/nvk_cmd_buffer.c @@ -778,7 +778,7 @@ nvk_cmd_buffer_get_cbuf_descriptor(struct nvk_cmd_buffer *cmd, case NVK_CBUF_TYPE_SHADER_DATA: *desc_out = (struct nvk_buffer_address) { - .base_addr = nvk_shader_data_address(shader), + .base_addr = shader->data_addr, .size = shader->data_size, }; return true; diff --git a/src/nouveau/vulkan/nvk_compute_pipeline.c b/src/nouveau/vulkan/nvk_compute_pipeline.c index ebe8d73a4fe..33856e60f7f 100644 --- a/src/nouveau/vulkan/nvk_compute_pipeline.c +++ b/src/nouveau/vulkan/nvk_compute_pipeline.c @@ -86,7 +86,7 @@ nva0c0_compute_setup_launch_desc_template(uint32_t *qmd, else unreachable("Invalid shared memory size"); - uint64_t addr = nvk_shader_address(shader); + uint64_t addr = shader->hdr_addr; assert(addr < 0xffffffff); NVA0C0_QMDV00_06_VAL_SET(qmd, PROGRAM_OFFSET, addr); NVA0C0_QMDV00_06_VAL_SET(qmd, REGISTER_COUNT, shader->info.num_gprs); @@ -99,7 +99,7 @@ nvc0c0_compute_setup_launch_desc_template(uint32_t *qmd, { base_compute_setup_launch_desc_template(qmd, shader, C0C0, 02, 01); - uint64_t addr = nvk_shader_address(shader); + uint64_t addr = shader->hdr_addr; assert(addr < 0xffffffff); NVC0C0_QMDV02_01_VAL_SET(qmd, SM_GLOBAL_CACHING_ENABLE, 1); @@ -124,7 +124,7 @@ nvc3c0_compute_setup_launch_desc_template(uint32_t *qmd, NVC3C0_QMDV02_02_VAL_SET(qmd, REGISTER_COUNT_V, shader->info.num_gprs); - uint64_t addr = nvk_shader_address(shader); + uint64_t addr = shader->hdr_addr; NVC3C0_QMDV02_02_VAL_SET(qmd, PROGRAM_ADDRESS_LOWER, addr & 0xffffffff); NVC3C0_QMDV02_02_VAL_SET(qmd, PROGRAM_ADDRESS_UPPER, addr >> 32); } @@ -146,7 +146,7 @@ nvc6c0_compute_setup_launch_desc_template(uint32_t *qmd, NVC6C0_QMDV03_00_VAL_SET(qmd, REGISTER_COUNT_V, shader->info.num_gprs); - uint64_t addr = nvk_shader_address(shader); + uint64_t addr = shader->hdr_addr; NVC6C0_QMDV03_00_VAL_SET(qmd, PROGRAM_ADDRESS_LOWER, addr & 0xffffffff); NVC6C0_QMDV03_00_VAL_SET(qmd, PROGRAM_ADDRESS_UPPER, addr >> 32); } diff --git a/src/nouveau/vulkan/nvk_graphics_pipeline.c b/src/nouveau/vulkan/nvk_graphics_pipeline.c index 019ecd56ca7..2f66aa97a82 100644 --- a/src/nouveau/vulkan/nvk_graphics_pipeline.c +++ b/src/nouveau/vulkan/nvk_graphics_pipeline.c @@ -325,7 +325,7 @@ nvk_graphics_pipeline_create(struct nvk_device *dev, if (stage != MESA_SHADER_FRAGMENT) last_geom = shader; - uint64_t addr = nvk_shader_address(shader); + uint64_t addr = shader->hdr_addr; if (dev->pdev->info.cls_eng3d >= VOLTA_A) { P_MTHD(p, NVC397, SET_PIPELINE_PROGRAM_ADDRESS_A(idx)); P_NVC397_SET_PIPELINE_PROGRAM_ADDRESS_A(p, idx, addr >> 32); diff --git a/src/nouveau/vulkan/nvk_heap.c b/src/nouveau/vulkan/nvk_heap.c index 467c269669b..182bebe0560 100644 --- a/src/nouveau/vulkan/nvk_heap.c +++ b/src/nouveau/vulkan/nvk_heap.c @@ -166,12 +166,7 @@ nvk_heap_alloc_locked(struct nvk_device *dev, struct nvk_heap *heap, assert(heap->bos[bo_idx].bo != NULL); assert(bo_offset + size <= heap->bos[bo_idx].bo->size); - if (heap->base_addr != 0) { - assert(bo_idx == 0); - *addr_out = bo_offset; - } else { - *addr_out = heap->bos[bo_idx].addr + bo_offset; - } + *addr_out = heap->bos[bo_idx].addr + bo_offset; if (map_out != NULL) { assert(heap->bos[bo_idx].map != NULL); *map_out = (char *)heap->bos[bo_idx].map + bo_offset; diff --git a/src/nouveau/vulkan/nvk_shader.c b/src/nouveau/vulkan/nvk_shader.c index d121a48a76b..dc137bef5f9 100644 --- a/src/nouveau/vulkan/nvk_shader.c +++ b/src/nouveau/vulkan/nvk_shader.c @@ -574,11 +574,19 @@ nvk_shader_upload(struct nvk_device *dev, struct nvk_shader *shader) #endif VkResult result = nvk_heap_upload(dev, &dev->shader_heap, data, - total_size, alignment, &shader->upload_addr); + total_size, alignment, + &shader->upload_addr); if (result == VK_SUCCESS) { shader->upload_size = total_size; - shader->hdr_offset = hdr_offset; - shader->data_offset = data_offset; + + shader->hdr_addr = shader->upload_addr + hdr_offset; + if (dev->pdev->info.cls_eng3d < VOLTA_A) { + const uint64_t heap_base_addr = + nvk_heap_contiguous_base_address(&dev->shader_heap); + assert(shader->upload_addr - heap_base_addr < UINT32_MAX); + shader->hdr_addr -= heap_base_addr; + } + shader->data_addr = shader->upload_addr + data_offset; } free(data); diff --git a/src/nouveau/vulkan/nvk_shader.h b/src/nouveau/vulkan/nvk_shader.h index 264d586db87..47ac49dc681 100644 --- a/src/nouveau/vulkan/nvk_shader.h +++ b/src/nouveau/vulkan/nvk_shader.h @@ -70,22 +70,19 @@ struct nvk_shader { uint32_t upload_size; uint64_t upload_addr; - uint32_t hdr_offset; - uint32_t data_offset; + + /* Address of the shader header (or start of the shader code) for compute + * shaders. + * + * Prior to Volta, this is relative to the start of the shader heap. On + * Volta and later, it's an absolute address. + */ + uint64_t hdr_addr; + + /* Address of the start of the shader data section */ + uint64_t data_addr; }; -static inline uint64_t -nvk_shader_address(const struct nvk_shader *shader) -{ - return shader->upload_addr + shader->hdr_offset; -} - -static inline uint64_t -nvk_shader_data_address(const struct nvk_shader *shader) -{ - return shader->upload_addr + shader->data_offset; -} - static inline bool nvk_shader_is_enabled(const struct nvk_shader *shader) {