From 0442a6c29259f5e40208db33fe79833d1dff289a Mon Sep 17 00:00:00 2001 From: Lu Yao Date: Sat, 12 Oct 2024 17:01:20 +0800 Subject: [PATCH] ac/radeonsi: compute htile for tile mode RADEON_SURF_MODE_1D on GFX6-8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Computing 'htile_size/meta_size' is allowed for RADEON_SURF_MODE_1D when RADEON_SURF_TC_COMPATIBLE_HTILE isn't set. Lacking of computing causes performance degradation in some scenarios. Fixes: d4d9ec55c589 ("radeonsi: implement TC-compatible HTILE") Signed-off-by: Lu Yao Reviewed-by: Samuel Pitoiset Reviewed-by: Marek Olšák Part-of: --- src/amd/common/ac_surface.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index a20a1a1b9d2..01705732c37 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -816,6 +816,7 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib, const struct ac_surf_config * struct legacy_surf_level *surf_level; struct legacy_surf_dcc_level *dcc_level; ADDR_E_RETURNCODE ret; + bool mode_has_htile = false; AddrSurfInfoIn->mipLevel = level; AddrSurfInfoIn->width = u_minify(config->info.width, level); @@ -986,8 +987,14 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib, const struct ac_surf_config * } } + if (surf_level->mode == RADEON_SURF_MODE_2D) + mode_has_htile = true; + else if (surf_level->mode == RADEON_SURF_MODE_1D && + !(surf->flags & RADEON_SURF_TC_COMPATIBLE_HTILE)) + mode_has_htile = true; + /* HTILE. */ - if (!is_stencil && AddrSurfInfoIn->flags.depth && surf_level->mode == RADEON_SURF_MODE_2D && + if (!is_stencil && AddrSurfInfoIn->flags.depth && mode_has_htile && level == 0 && !(surf->flags & RADEON_SURF_NO_HTILE)) { AddrHtileIn->flags.tcCompatible = AddrSurfInfoOut->tcCompatible; AddrHtileIn->pitch = AddrSurfInfoOut->pitch;