diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c index 9bbc82b1a1b..c5428bb0c96 100644 --- a/src/intel/dev/intel_device_info.c +++ b/src/intel/dev/intel_device_info.c @@ -102,6 +102,7 @@ static const struct intel_device_info intel_device_info_gfx3 = { .num_subslices = { 1, }, .max_eus_per_subslice = 8, .num_thread_per_eu = 4, + .grf_size = 32, .timestamp_frequency = 12500000, }; @@ -113,6 +114,7 @@ static const struct intel_device_info intel_device_info_i965 = { .num_subslices = { 1, }, .max_eus_per_subslice = 8, .num_thread_per_eu = 4, + .grf_size = 32, .max_vs_threads = 16, .max_gs_threads = 2, .max_wm_threads = 8 * 4, @@ -134,6 +136,7 @@ static const struct intel_device_info intel_device_info_g4x = { .num_subslices = { 1, }, .max_eus_per_subslice = 10, .num_thread_per_eu = 5, + .grf_size = 32, .max_vs_threads = 32, .max_gs_threads = 2, .max_wm_threads = 10 * 5, @@ -154,6 +157,7 @@ static const struct intel_device_info intel_device_info_ilk = { .num_subslices = { 1, }, .max_eus_per_subslice = 12, .num_thread_per_eu = 6, + .grf_size = 32, .max_vs_threads = 72, .max_gs_threads = 32, .max_wm_threads = 12 * 6, @@ -177,6 +181,7 @@ static const struct intel_device_info intel_device_info_snb_gt1 = { .num_subslices = { 1, }, .max_eus_per_subslice = 6, .num_thread_per_eu = 6, /* Not confirmed */ + .grf_size = 32, .max_vs_threads = 24, .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */ .max_wm_threads = 40, @@ -207,6 +212,7 @@ static const struct intel_device_info intel_device_info_snb_gt2 = { .num_subslices = { 1, }, .max_eus_per_subslice = 12, .num_thread_per_eu = 6, /* Not confirmed */ + .grf_size = 32, .max_vs_threads = 60, .max_gs_threads = 60, .max_wm_threads = 80, @@ -232,6 +238,7 @@ static const struct intel_device_info intel_device_info_snb_gt2 = { .has_pln = true, \ .has_64bit_float = true, \ .has_surface_tile_offset = true, \ + .grf_size = 32, \ .timestamp_frequency = 12500000, \ .max_constant_urb_size_kb = 16 @@ -428,6 +435,7 @@ static const struct intel_device_info intel_device_info_hsw_gt3 = { .supports_simd16_3src = true, \ .has_surface_tile_offset = true, \ .num_thread_per_eu = 7, \ + .grf_size = 32, \ .max_vs_threads = 504, \ .max_tcs_threads = 504, \ .max_tes_threads = 504, \ @@ -1206,6 +1214,7 @@ static const struct intel_device_info intel_device_info_arl_h = { .ver = 20, \ .verx10 = 200, \ .num_subslices = dual_subslices(1), \ + .grf_size = 64, \ .has_64bit_float = true, \ .has_64bit_int = true, \ .has_integer_dword_mul = false, \ diff --git a/src/intel/dev/intel_device_info.py b/src/intel/dev/intel_device_info.py index 45243dcc536..c6a48755e49 100644 --- a/src/intel/dev/intel_device_info.py +++ b/src/intel/dev/intel_device_info.py @@ -373,6 +373,9 @@ Struct("intel_device_info", Member("unsigned", "num_thread_per_eu", compiler_field=True, comment="Number of threads per eu, varies between 4 and 8 between generations."), + Member("uint8_t", "grf_size", + comment="Size of a register from the EU GRF file in bytes."), + Member("uint8_t", "slice_masks", comment="A bit mask of the slices available."),