From 02516ff0f9d1989f34672121190e19bdee3b9b13 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 1 Nov 2024 01:21:33 -0400 Subject: [PATCH] nir: remove dead code due to IO being always lowered in st/mesa Reviewed-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.h | 1 - src/compiler/nir/nir.c | 44 ------------------- src/compiler/nir/nir.h | 11 +---- src/freedreno/ir3/ir3_compiler.c | 1 - .../drivers/etnaviv/etnaviv_compiler.c | 1 - src/gallium/drivers/r600/r600_pipe_common.c | 1 - src/intel/compiler/brw_compiler.c | 1 - src/intel/compiler/elk/elk_nir_options.c | 1 - src/microsoft/compiler/nir_to_dxil.c | 1 - src/nouveau/codegen/nv50_ir_from_nir.cpp | 2 - src/panfrost/compiler/bifrost_compile.h | 1 - src/panfrost/midgard/midgard_compile.h | 1 - 12 files changed, 1 insertion(+), 65 deletions(-) diff --git a/src/asahi/compiler/agx_compile.h b/src/asahi/compiler/agx_compile.h index b2e4e0b9c33..c2666d3e4a8 100644 --- a/src/asahi/compiler/agx_compile.h +++ b/src/asahi/compiler/agx_compile.h @@ -359,7 +359,6 @@ static const nir_shader_compiler_options agx_nir_options = { .has_cs_global_id = true, .lower_device_index_to_zero = true, .lower_hadd = true, - .vectorize_io = true, .has_amul = true, .has_isub = true, .support_16bit_alu = true, diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index 0c49a9e952d..45a94e0efff 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -2596,50 +2596,6 @@ nir_system_value_from_intrinsic(nir_intrinsic_op intrin) } } -/* OpenGL utility method that remaps the location attributes if they are - * doubles. Not needed for vulkan due the differences on the input location - * count for doubles on vulkan vs OpenGL - * - * The bitfield returned in dual_slot is one bit for each double input slot in - * the original OpenGL single-slot input numbering. The mapping from old - * locations to new locations is as follows: - * - * new_loc = loc + util_bitcount(dual_slot & BITFIELD64_MASK(loc)) - */ -void -nir_remap_dual_slot_attributes(nir_shader *shader, uint64_t *dual_slot) -{ - assert(shader->info.stage == MESA_SHADER_VERTEX); - - *dual_slot = 0; - nir_foreach_shader_in_variable(var, shader) { - if (glsl_type_is_dual_slot(glsl_without_array(var->type))) { - unsigned slots = glsl_count_attribute_slots(var->type, true); - *dual_slot |= BITFIELD64_MASK(slots) << var->data.location; - } - } - - nir_foreach_shader_in_variable(var, shader) { - var->data.location += - util_bitcount64(*dual_slot & BITFIELD64_MASK(var->data.location)); - } -} - -/* Returns an attribute mask that has been re-compacted using the given - * dual_slot mask. - */ -uint64_t -nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot) -{ - while (dual_slot) { - unsigned loc = u_bit_scan64(&dual_slot); - /* mask of all bits up to and including loc */ - uint64_t mask = BITFIELD64_MASK(loc + 1); - attribs = (attribs & mask) | ((attribs & ~mask) >> 1); - } - return attribs; -} - void nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_def *src, bool bindless) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 68fe9179680..ca8d0264d12 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -3985,8 +3985,8 @@ typedef struct nir_shader_compiler_options { bool lower_insert_byte; bool lower_insert_word; + /* TODO: this flag is potentially useless, remove? */ bool lower_all_io_to_temps; - bool lower_all_io_to_elements; /* Indicates that the driver only has zero-based vertex id */ bool vertex_id_zero_based; @@ -4097,11 +4097,6 @@ typedef struct nir_shader_compiler_options { */ bool lower_mul_32x16; - /** - * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's - * for IO purposes and would prefer loads/stores be vectorized. - */ - bool vectorize_io; bool vectorize_tess_levels; bool lower_to_scalar; nir_instr_filter_cb lower_to_scalar_filter; @@ -6985,10 +6980,6 @@ bool nir_opt_ray_query_ranges(nir_shader *shader); void nir_sweep(nir_shader *shader); -void nir_remap_dual_slot_attributes(nir_shader *shader, - uint64_t *dual_slot_inputs); -uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot); - nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val); gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin); diff --git a/src/freedreno/ir3/ir3_compiler.c b/src/freedreno/ir3/ir3_compiler.c index b80ef318d59..74b642ca178 100644 --- a/src/freedreno/ir3/ir3_compiler.c +++ b/src/freedreno/ir3/ir3_compiler.c @@ -303,7 +303,6 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id, compiler->nir_options.has_iadd3 = dev_info->a6xx.has_sad; if (compiler->gen >= 6) { - compiler->nir_options.vectorize_io = true, compiler->nir_options.force_indirect_unrolling = nir_var_all, compiler->nir_options.lower_device_index_to_zero = true; diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler.c b/src/gallium/drivers/etnaviv/etnaviv_compiler.c index 63d7866e5cf..ecdcd32a10c 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler.c +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler.c @@ -68,7 +68,6 @@ etna_compiler_create(const char *renderer, const struct etna_core_info *info) .lower_uniforms_to_ubo = info->halti >= 2, .force_indirect_unrolling = nir_var_all, .max_unroll_iterations = 32, - .vectorize_io = true, .lower_pack_32_2x16_split = true, .lower_pack_64_2x32_split = true, .lower_unpack_32_2x16_split = true, diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c index 1781378873f..432e99b6755 100644 --- a/src/gallium/drivers/r600/r600_pipe_common.c +++ b/src/gallium/drivers/r600/r600_pipe_common.c @@ -1349,7 +1349,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen, */ .max_unroll_iterations = 255, .lower_interpolate_at = true, - .vectorize_io = true, .has_umad24 = true, .has_umul24 = true, .has_fmulz = true, diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index 87a32b968a2..f72a556a1b2 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -75,7 +75,6 @@ const struct nir_shader_compiler_options brw_scalar_nir_options = { .lower_usub_borrow = true, .max_unroll_iterations = 32, .support_16bit_alu = true, - .vectorize_io = true, .vectorize_tess_levels = true, .vertex_id_zero_based = true, .scalarize_ddx = true, diff --git a/src/intel/compiler/elk/elk_nir_options.c b/src/intel/compiler/elk/elk_nir_options.c index 458a00ced2b..59141d82a18 100644 --- a/src/intel/compiler/elk/elk_nir_options.c +++ b/src/intel/compiler/elk/elk_nir_options.c @@ -23,7 +23,6 @@ .lower_bitfield_extract = true, \ .lower_bitfield_insert = true, \ .lower_device_index_to_zero = true, \ - .vectorize_io = true, \ .vectorize_tess_levels = true, \ .scalarize_ddx = true, \ .lower_insert_byte = true, \ diff --git a/src/microsoft/compiler/nir_to_dxil.c b/src/microsoft/compiler/nir_to_dxil.c index ee0da85327e..34926f289b2 100644 --- a/src/microsoft/compiler/nir_to_dxil.c +++ b/src/microsoft/compiler/nir_to_dxil.c @@ -111,7 +111,6 @@ nir_options = { .lower_extract_byte = true, .lower_insert_word = true, .lower_insert_byte = true, - .lower_all_io_to_elements = true, .lower_hadd = true, .lower_uadd_sat = true, .lower_usub_sat = true, diff --git a/src/nouveau/codegen/nv50_ir_from_nir.cpp b/src/nouveau/codegen/nv50_ir_from_nir.cpp index bd55207223c..9c4f85475e0 100644 --- a/src/nouveau/codegen/nv50_ir_from_nir.cpp +++ b/src/nouveau/codegen/nv50_ir_from_nir.cpp @@ -3614,7 +3614,6 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type) op.lower_insert_byte = true; op.lower_insert_word = true; op.lower_all_io_to_temps = false; - op.lower_all_io_to_elements = false; op.vertex_id_zero_based = false; op.lower_base_vertex = false; op.lower_helper_invocation = false; @@ -3627,7 +3626,6 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type) op.lower_uadd_sat = true; // TODO op.lower_usub_sat = true; // TODO op.lower_iadd_sat = true; // TODO - op.vectorize_io = false; op.lower_to_scalar = false; op.unify_interfaces = false; op.lower_mul_2x32_64 = true; // TODO diff --git a/src/panfrost/compiler/bifrost_compile.h b/src/panfrost/compiler/bifrost_compile.h index 09272cf8308..3aae8f4f527 100644 --- a/src/panfrost/compiler/bifrost_compile.h +++ b/src/panfrost/compiler/bifrost_compile.h @@ -78,7 +78,6 @@ void bifrost_compile_shader_nir(nir_shader *nir, .lower_usub_borrow = true, \ \ .has_isub = true, \ - .vectorize_io = true, \ .vectorize_vec2_16bit = true, \ .fuse_ffma16 = true, \ .fuse_ffma32 = true, \ diff --git a/src/panfrost/midgard/midgard_compile.h b/src/panfrost/midgard/midgard_compile.h index d40cf4349f6..84f52b200a8 100644 --- a/src/panfrost/midgard/midgard_compile.h +++ b/src/panfrost/midgard/midgard_compile.h @@ -96,7 +96,6 @@ static const nir_shader_compiler_options midgard_nir_options = { .lower_uniforms_to_ubo = true, .has_fsub = true, .has_isub = true, - .vectorize_io = true, .has_cs_global_id = true, .lower_cs_local_index_to_id = true,